Abstract: Systems and methods are disclosed for routing of streaming data as between multiple compute resources. For example, the system may comprise a processor, a field programmable gate array (FPGA), a shared memory that is shared by a user space of an operating system for the processor and the FPGA, a network protocol stack, and driver code for execution by the processor. The driver code can be configured to (1) copy the streaming data received by the network protocol stack into the shared memory, (2) facilitate DMA transfers of the streaming data from the shared memory into the FPGA for processing thereby, (3) receive a stream of processed data from the FPGA, and (4) deliver the received processed data to the network protocol stack for delivery to one or more data consumers.

Abstract: Systems and methods are disclosed for fast track routing of streaming data as between multiple compute resources. For example, the system may comprise a first processor, a second processor, a shared memory that is mapped into a kernel and user space of an operating system for the processor, a network protocol stack, and driver code for execution within the kernel space of the operating system while the operating system is in the kernel mode. The driver code can be configured to (1) maintain a kernel level interface into the network protocol stack, (2) copy the streaming data from the network protocol stack into the shared memory, wherein the copy operation is performed by the driver code without the operating system transitioning to the user mode, and (3) facilitate DMA transfers of data from the shared memory into the second processor for processing thereby.

Abstract: A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to generate a plurality of financial market data messages from a plurality of the data fields, each generated message having a specified message format.

Abstract: Systems and methods are disclosed for fast track routing of streaming data as between multiple compute resources. For example, the system may comprise a first processor, a second processor, a shared memory that is mapped into a kernel and user space of an operating system for the processor, a network protocol stack, and driver code for execution within the kernel space of the operating system while the operating system is in the kernel mode. The driver code can be configured to (1) maintain a kernel level interface into the network protocol stack, (2) copy the streaming data from the network protocol stack into the shared memory, wherein the copy operation is performed by the driver code without the operating system transitioning to the user mode, and (3) facilitate DMA transfers of data from the shared memory into the second processor for processing thereby.

Abstract: Systems and methods are disclosed for fast track routing of streaming data as between multiple compute resources. For example, the system may comprise a processor, reconfigurable logic device, a shared memory that is mapped into a kernel and user space of an operating system for the processor, a network protocol stack, and driver code for execution within the kernel space of the operating system while the operating system is in the kernel mode. The driver code can be configured to (1) maintain a kernel level interface into the network protocol stack, (2) copy the streaming data from the network protocol stack into the shared memory, wherein the copy operation is performed by the driver code without the operating system transitioning to the user mode, and (3) facilitate DMA transfers of data from the shared memory into the reconfigurable logic device for processing thereby.

Abstract: A basket calculation engine is deployed to receive a stream of data and accelerate the computation of basket values based on that data. In a preferred embodiment, the basket calculation engine is used to process financial market data to compute the net asset values (NAVs) of financial instrument baskets. The basket calculation engine can be deployed on a coprocessor and can also be realized via a pipeline, the pipeline preferably comprising a basket association lookup module and a basket value updating module. The coprocessor is preferably a reconfigurable logic device such as a field programmable gate array (FPGA).

Abstract: Disclosed herein are methods and systems for integrating an enterprise's structured and unstructured data to provide users and enterprise applications with efficient and intelligent access to that data. In accordance with exemplary embodiments, the generation of feature vectors about unstructured data can be hardware-accelerated by processing streaming unstructured data through a reconfigurable logic device, a graphics processor unit (GPU), or chip multi-processor (CMP) to determine features that can aid clustering of similar data objects.

Abstract: Systems and methods are disclosed for fast track routing of streaming data as between multiple compute resources. For example, the system may comprise a processor, reconfigurable logic device, a shared memory that is mapped into a kernel and user space of an operating system for the processor, a network protocol stack, and driver code for execution within the kernel space of the operating system while the operating system is in the kernel mode. The driver code can be configured to (1) maintain a kernel level interface into the network protocol stack, (2) copy the streaming data from the network protocol stack into the shared memory, wherein the copy operation is performed by the driver code without the operating system transitioning to the user mode, and (3) facilitate DMA transfers of data from the shared memory into the reconfigurable logic device for processing thereby.

Abstract: A basket calculation engine is deployed to receive a stream of data and accelerate the computation of basket values based on that data. In a preferred embodiment, the basket calculation engine is used to process financial market data to compute the net asset values (NAVs) of financial instrument baskets. The basket calculation engine can be deployed on a coprocessor and can also be realized via a pipeline, the pipeline preferably comprising a basket association lookup module and a basket value updating module. The coprocessor is preferably a reconfigurable logic device such as a field programmable gate array (FPGA).

Abstract: Various techniques are disclosed for offloading the processing of data packets that contain financial market data. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize financial market data in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.

Abstract: Disclosed herein are methods and systems for integrating an enterprise's structured and unstructured data to provide users and enterprise applications with efficient and intelligent access to that data. In accordance with exemplary embodiments, the generation of classification information about unstructured data can be hardware-accelerated by processing streaming unstructured data through a reconfigurable logic device, a graphics processor unit (GPU), or chip multi-processor (CMP) to generate the classification metadata about the unstructured data.

Abstract: A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to synthesize quote events associated with a plurality of financial instruments from a financial market data feed.

Abstract: A variety of embodiments for hardware-accelerating the processing of financial market depth data are disclosed. A coprocessor, which may be resident in a ticker plant, can be configured to update order books based on financial market depth data at extremely low latency. Such a coprocessor can also be configured to enrich a stream of limit order events pertaining to financial instruments with data from a plurality of updated order books.

Abstract: Various techniques are disclosed for offloading the processing of data packets that contain financial market data. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize financial market data in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.

Abstract: Various techniques are disclosed for offloading the processing of data packets. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize data from the data packets in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.

Abstract: A variety of embodiments for hardware-accelerating the processing of financial market depth data are disclosed. A coprocessor, which may be resident in a ticker plant, can be configured to update order books based on financial market depth data at extremely low latency. Such a coprocessor can also be configured to enrich a stream of limit order events pertaining to financial instruments with data from a plurality of updated order books.

Abstract: Various techniques are disclosed for offloading the processing of data packets. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize data from the data packets in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.

Abstract: A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to map the symbols present in the financial market data messages to another symbology.

Abstract: Methods and systems for processing financial market data using a reconfigurable logic device are disclosed. Various operations such as volume weighted average price (VWAP) operations can be performed on the financial market data using firmware logic deployed on the reconfigurable logic device to accelerate the speed of processing.

Abstract: A high speed system and method for processing financial instrument order data are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to monitor a financial instrument order based on a risk profile to determine whether the order is appropriate. If determined appropriate, a financial instrument order can be routed to a trading venue. With respect to another exemplary embodiment, a reconfigurable logic device is employed to maintain a financial instrument order book.