Patents by Inventor David G. McIntyre

David G. McIntyre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9034734
    Abstract: Methods are provided for using masking techniques and plasma etching techniques to dice a compound semiconductor wafer into dies. Using these methods allows compound semiconductor die to be obtained that have smooth side walls, a variety of shapes and dimensions, and a variety of side wall profiles. In addition, by using these techniques to perform the dicing operations, the locations of features of the die relative to the side walls are ascertainable with certainty such that one or more of the side walls can be used as a passive alignment feature to precisely align one or more of the die with an external device.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: May 19, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Chee Siong Peh, Chiew Hai Ng, David G. McIntyre
  • Publication number: 20150098482
    Abstract: Methods are provided for using masking techniques and plasma etching techniques to dice a compound semiconductor wafer into dies. Using these methods allows compound semiconductor die to be obtained that have smooth side walls, a variety of shapes and dimensions, and a variety of side wall profiles. In addition, by using these techniques to perform the dicing operations, the locations of features of the die relative to the side walls are ascertainable with certainty such that one or more of the side walls can be used as a passive alignment feature to precisely align one or more of the die with an external device.
    Type: Application
    Filed: December 16, 2014
    Publication date: April 9, 2015
    Inventors: Chee Siong Peh, Chiew Hai NG, David G. McIntyre
  • Publication number: 20140367816
    Abstract: A opto-electronic device includes a semiconductor device and a non-imaging optical concentrator on a surface of the semiconductor device. The semiconductor device has a substrate and a photodetector formed on a surface of the substrate. The non-imaging optical concentrator has a peripheral surface extending around a central region of the active area of the photodetector. The non-imaging optical concentrator redirects at least a portion of incoming light into the active area.
    Type: Application
    Filed: June 12, 2013
    Publication date: December 18, 2014
    Inventors: Ramana M.V. Murty, Tak Kui Wang, David G. McIntyre, Ye Chen
  • Publication number: 20140217556
    Abstract: Methods are provided for using masking techniques and plasma etching techniques to dice a compound semiconductor wafer into dies. Using these methods allows compound semiconductor die to be obtained that have smooth side walls, a variety of shapes and dimensions, and a variety of side wall profiles. In addition, by using these techniques to perform the dicing operations, the locations of features of the die relative to the side walls are ascertainable with certainty such that one or more of the side walls can be used as a passive alignment feature to precisely align one or more of the die with an external device.
    Type: Application
    Filed: February 4, 2013
    Publication date: August 7, 2014
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Chee Siong Peh, Chiew Hai NG, David G. McIntyre
  • Patent number: 6146917
    Abstract: A process for the preparation of hermetically sealed electronically active microstructures involves the preparation of a plurality of microstructures and associated conductive paths and lead bond areas on a single wafer such that areas surrounding the microstructures are maintained in a planar condition. A second wafer having a plurality of microstructure-receiving cavities is placed atop the first wafer and fusion or anodically bonded. The microstructures are preferably connected to lead bond pads which lie outside the surround, the second wafer also having bond pad accessing through-holes to facilitate bonding electrical leads to the devices after sawing from the wafer. The lead-connected devices may be further encapsulated by injection molding, potting, or other conventional encapsulative packaging techniques.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: November 14, 2000
    Assignee: Ford Motor Company
    Inventors: Xia Zhang, David G. McIntyre, William Chi-Keung Tang
  • Patent number: 5837935
    Abstract: A hermetic seal for an electronic component has a cap having a base portion with laterally extending walls. The laterally extending walls define a main chamber therebetween. A cavity is formed in the end of the laterally extending walls to define a secondary chamber and divide the end of the laterally extending walls into a first area and second area. The cap is hermetically sealed to the base at the first and second areas of the laterally extending walls so that the secondary chamber and the main chamber are separately hermetically sealed.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: November 17, 1998
    Assignee: Ford Motor Company
    Inventors: Judd S. Carper, David G. McIntyre
  • Patent number: 5162258
    Abstract: A (GaAs-resident) application specific monolithic microwave integrated circuit (ASMMIC) is fabricated through the use of footprints that include a portion of the metallization through which the circuit components within the wafer are to be interconnected. The metallization is a three layers structure, the first two layers of which include strategically arranged reactance circuit components (MIM) capacitors. A first of the three metal layers is formed on a first surface of the substrate which contains a plurality of semiconductor device regions and conductive material for ohmic contact to the regions, so that portions of the first metal layer are in ohmic contact with the conductive material. The first metal layer provides the bottom plate of the MIM capacitors. A dielectric layer, which serves as the dielectric insulator of the MIM capacitors, is formed on second portions of the first metal layer.
    Type: Grant
    Filed: March 20, 1990
    Date of Patent: November 10, 1992
    Inventors: Zachary J. Lemnios, David G. McIntyre, Chung-Lim Lau, Dennis A. Williams
  • Patent number: 4959705
    Abstract: A (GaAs-resident) application specific monolithic microwave integrated circuit (ASMMIC) is fabricated through the use of footprints that include a portion of the metallization through which the circuit components within the wafer are to be interconnected. The metallization is a three layers structure, the first two layers of which include strategically arranged reactance circuit components (MIM) capacitors. A first of the three metal layers is formed on a first surface of the substrate which contains a plurality of semiconductor device regions and conductive material for ohmic contact to the regions, so that portions of the first metal layer are in ohmic contact with the conductive material. The first metal layer provides the bottom plate of the MIM capacitors. A dielectric layer, which serves as the dielectric insulator of the MIM capacitors, is formed on second portions of the first metal layer.
    Type: Grant
    Filed: October 17, 1988
    Date of Patent: September 25, 1990
    Assignee: Ford Microelectronics, Inc.
    Inventors: Zachary J. Lemnios, David G. McIntyre, Chung-Lim Lau, Dennis A. Williams
  • Patent number: 4114837
    Abstract: An air lifting vehicle includes, inter alia, a main frame containing an engine, a helicopter-type rotor driven by the engine, a rear located propeller which provides torque compensation for the rotor as well as yaw control for the vehicle, and a pilot's cabin. Attached to the frame through a plurality of outwardly extending truss members is a keel structure which includes a circular truss section essentially coaxial with and positioned above the rotor and other generally triangular or rounded triangular truss sections attached fore and aft of the circular truss section. Balloon members including fore and aft generally triangular Forlanini envelope sections are secured to the keel and laced together at the center to define a circular opening or duct above the rotor. A pair of forward thrusting propellers are driven by an auxiliary engine carried in the frame and are gimbaled in the elevational plane for pitch control of the vehicle.
    Type: Grant
    Filed: March 24, 1977
    Date of Patent: September 19, 1978
    Assignee: Skagit Corporation
    Inventors: Vladimir H. Pavlecka, David G. McIntyre