Abstract: A dangerous driving conditions warning system for a vehicle such as an automobile is described. The warning system captures signals from two or more devices in an automobile, such as speedometer, distance measuring device, and airbag, and conveys the signals to a decision circuit which determines whether a dangerous driving condition exists and outputs an activation signal upon detecting a dangerous condition. The activation signal is sent to and activates an indicator such as a warning light or loud audible warning. The warning indicator alerts a trailing vehicle and other vehicles near the vehicle equipped with the warning system of the existence of one of various conditions warranting caution, a reduction in speed, or a veering or turn.

Abstract: In an operational amplifier (op amp) for use in an integrated circuit (IC) device, a first field effect transistor (FET) in a current-mirror circuit is connected, and provides a bias current, to at least a second FET in a differential amplifier. As the voltage of the power supply to the op amp decreases in response to the advance of IC technology, the first FET operates in a non-saturation region of its output characteristics. As a result, the current provided by the first FET to the differential amplifier varies substantially with a common-mode signal, whose signal level equals the average of those of non-inverting and inverting input signals to the differential amplifier. Consequently, the op amp imparts a significant gain, referred to as a common-mode gain, to the common-mode signal, which is undesirable. To reduce such a common-mode gain, in accordance with the invention, the bias current provided by the first FET is measured to adjust a second current which affects the output of the op amp.

Abstract: A very low voltage sampling circuit which is capable of a full ranging output when powered with a very low voltage, e.g., of about 1 volt. A pre-charge circuit is combined with a sample and hold circuit to avoid the need for low threshold switching devices in the sampling circuit, thus avoiding output droop due to the increased leakage of low threshold devices. The pre-charge circuit is placed between the sample and hold circuit and an output of the sampling circuit to `boost` the voltage level of the output of the sample and hold circuit to above a predetermined threshold voltage level. The pre-charge circuit includes an output voltage boost capacitor which is charged before the hold cycle of the sampling circuit. The negative node of the output voltage boost capacitor is charged to a reference voltage based on a range of correction for the output voltage, and the positive node is charged approximately to a level of the input signal itself.

Abstract: A very low voltage sampling circuit which is capable of a full ranging output when powered with a very low voltage, e.g., of about 1 volt. A pre-charge circuit is combined with a sample and hold circuit to avoid the need for low threshold switching devices in the sampling circuit, thus avoiding output droop due to the increased leakage of low threshold devices. The pre-charge circuit is placed between the sample and hold circuit and an output of the sampling circuit to `boost` the voltage level of the output of the sample and hold circuit to above a predetermined threshold voltage level. The pre-charge circuit includes an output voltage boost capacitor which is charged before the hold cycle of the sampling circuit. The negative node of the output voltage boost capacitor is charged to a reference voltage, and the positive node is charged approximately to a level of the input signal itself.

Abstract: A sampling circuit which is capable of a full ranging output when powered with very low voltage supplies, e.g., of about 1 volt. A current copier function is added to a sample and hold circuit to avoid the need for low threshold switching devices in the sampling circuit, thus avoiding output droop due to the increased leakage of low threshold devices. A pre-charge circuit is placed between the sample and hold circuit and a current storage transistor to `boost` the voltage level of the output of the sample and hold circuit above the threshold voltage of the current storage transistor. The pre-charge circuit includes an output voltage boost capacitor which is charged before the hold cycle of the sampling circuit. The level of the voltage charged onto the output voltage boost capacitor is based on the threshold voltage of the current storage transistor.

Abstract: A current copier is disclosed having a reduced transconductance at the output to reduce the corresponding amount of deviation of the current sample. The disclosed current copier may be implemented on an integrated circuit and includes a residue circuit for receiving an input current at an input node during a first operating cycle, for generating an estimate current corresponding to the input current, and for generating a residue current from the input current and the estimate current; and a first current copier for storing the residue current during the first operating cycle, and for generating an output current from the stored residue current during a second operating cycle.

Abstract: An analog-to-digital converter includes a coarse conversion circuit, a fine conversion circuit, a scaling circuit, and a logic circuit. An analog input signal is applied to the scaling circuit which provides a scaled signal. The scaled signal is applied to the fine conversion circuit which provides a digital control signal. The digital control signal is applied to the coarse conversion circuit for initializing the coarse conversion circuit. Thereafter, the analog input signal is applied to the initialized coarse conversion circuit which provides a first digital code and a reference signal associated with the first digital code. A remainder signal is determined at least in part by the difference between the analog input signal and the reference signal. The remainder signal is applied to the fine conversion circuit which provides a second digital code. The logic circuit determines a digital output signal, representing the analog input signal, in response to at least the first and second digital codes.

Abstract: An analog-to-digital converter includes first current sources, second current sources, current regulators, and conductive channels, with each conductive channel coupled to a respective first current source, second current source, and current regulator. An analog input is split into the first current sources. Each second current source is associated with a unique reference current. At each channel where the first current source couples a larger current than the reference current, the current regulator couples a difference current to allow the second current source to couple the reference current. Alternatively, at each channel where the first current source couples a smaller current than the reference current, the current regulator does not couple a difference current, and the second current source couples the same current as the first current source.

Abstract: An integrated circuit is disclosed including an analog-to-digital (A/D) converter having an offset source for providing an offset signal; and a first reference array including a plurality of cells for generating a first output signal from an input signal and the offset signal, for generating a second output signal from the offset signal, and for generating an A/D output signal from the first and second output signals.