Abstract: Power detector integrally formed within a printed transmission line to capacitively couple a portion of signal power propagating on the printed transmission line and a power detector circuit that receives coupled power output from the power detector to detect a power level of the signal power. The power detector is designed such that capacitance of the coupling capacitor is absorbed into a distributed capacitance of the transmission line to maintain continuity of a characteristic impedance of the transmission line.

Abstract: Power detector integrally formed within a printed transmission line to capacitively couple a portion of signal power propagating on the printed transmission line and a power detector circuit that receives coupled power output from the power detector to detect a power level of the signal power. The power detector is designed such that capacitance of the coupling capacitor is absorbed into a distributed capacitance of the transmission line to maintain continuity of a characteristic impedance of the transmission line.

Abstract: Methods, systems, and apparatuses for a reader transceiver circuit are described. The reader transceiver circuit incorporates a frequency generator, such as a surface acoustic wave (SAW) oscillator. A reader incorporating the reader transceiver circuit is configured to read a tag at very close range, including while being in contact with the tag. The transceiver can be coupled to various host devices in a variety of ways, including being located in a RFID reader (e.g., mobile or fixed position), a computing device, a barcode reader, etc. The transceiver can be located in an RFID module that is attachable to a host device, can be configured in the host device, or can be configured to communicate with the host device over a distance. The RFID module may include one or more antennas, such as a first antenna configured to receive a magnetic field component of an electromagnetic wave and a second antenna configured to receive an electric field component of an electromagnetic wave.

Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.

Abstract: Methods, systems, and apparatuses for a reader transceiver circuit are described. The reader transceiver circuit incorporates a frequency generator, such as a surface acoustic wave (SAW) oscillator. A reader incorporating the reader transceiver circuit is configured to read a tag at very close range, including while being in contact with the tag. The transceiver can be coupled to various host devices in a variety of ways, including being located in a RFID reader (e.g., mobile or fixed position), a computing device, a barcode reader, etc. The transceiver can be located in an RFID module that is attachable to a host device, can be configured in the host device, or can be configured to communicate with the host device over a distance. The RFID module may include one or more antennas, such as a first antenna configured to receive a magnetic field component of an electromagnetic wave and a second antenna configured to receive an electric field component of an electromagnetic wave.

Abstract: Capacitance and inductance expressions used for modeling critical on-chip metal interconnects. A method for calculating high frequency limit capacitances C? and inductances L? of coplanar transmission line structures over silicon substrate utilizes field based expressions derived for a single coplanar T-line structures over silicon, and coupled coplanar T lines over silicon. For coupled coplanar structures, the field lines based calculation is performed separately for odd and even modes.

Abstract: A tool for analog and mixed signal circuits includes a unit enabling a user to identify one or more critical interconnect lines in a chip architecture and one or more selectable, predefined topologies for said critical interconnect lines. Each topology includes one or more signal wires and a current return path. A majority of the electric field lines are contained within the boundary of the topology. The invention also includes a method for designing analog and mixed signal (AMS) integrated circuits (IC), including defining a chip architecture and a floor plan, identifying one or more critical interconnect lines and selecting pre-designed transmission line topologies for the critical interconnect lines.

Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.

Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.

Abstract: An integrated circuit design kit including one or more circuit components topologies, and one or more critical interconnect lines topologies. The interconnect line topologies may be predefined. The kit may further include one or more circuit components models and one or more critical interconnect lines models.

Abstract: Capacitance and inductance expressions used for modeling critical on-chip metal interconnects. A method for calculating high frequency limit capacitances C? and inductances L? of coplanar transmission line structures over silicon substrate utilizes field based expressions derived for a single coplanar T-line structures over silicon, and coupled coplanar T lines over silicon. For coupled coplanar structures, the field lines based calculation is performed separately for odd and even modes.

Abstract: A method of modeling capacitance for a structure comprising a pair of long conductors surrounded by a dielectric material and supported by a substrate. In particular, the structure may be on-chip coplanar transmission lines over a conductive substrate operated at very high frequencies, such that the substrate behaves as a perfect dielectric. It is assumed that the surrounding dielectric material is a first dielectric with a first permittivity (?1) and the substrate is a second dielectric with a second permittivity (?2). The method models the capacitance (C1) for values of the first and second permittivity (?1, ?2) based on known capacitance (C2) computed for a basis structure with the same first permittivity (?1) and a different second permittivity (?2). Extrapolation or interpolation formulae are suggested to model the sought capacitance (C1) through one or more known capacitances (C2).

Abstract: A method of modeling capacitance for a structure comprising a pair of long conductors surrounded by a dielectric material and supported by a substrate. In particular, the structure may be on-clip coplanar transmission lines over a conductive substrate operated at very high frequencies, such that the substrate behaves as a perfect dielectric. It is assumed that the surrounding dielectric material is a first dielectric with a first permittivity (?1) and the substrate is a second dielectric with a second permittivity (?2). The method models the capacitance (C1) for values of the first and second permittivity (?1, ?2) based on known capacitance (C2) computed for a basis structure with the same first permittivity (?1) and a different second permittivity (?2). Extrapolation or interpolation formulae are suggested to model the sought capacitance (C1) through one or more known capacitances (C2).

Abstract: Methods are provided for building integrated circuit transformer devices having compact and optimized architectures for use in MMW (millimeter-wave) applications. The integrated circuit transformer devices have universal and scalable architectures that can be used as templates or building blocks for constructing various types of on-chip devices for millimeter-wave applications.

Abstract: Methods are provided for building integrated circuit transformer devices having compact and optimized architectures for use in MMW (millimeter-wave) applications. The integrated circuit transformer devices have universal and scalable architectures that can be used as templates or building blocks for constructing various types of on-chip devices for millimeter-wave applications.

Abstract: A method and system for design and modeling of transmission lines are provided. The method includes providing a set of models of core structures (211) of transmission line cells and expanding each of the models of core structures (211) to include different neighboring elements. The parameter characteristics of the expanded core structures (214a-214c) are compared to determine a model having a minimal sufficiently closed neighborhood environment. A closed neighborhood environment complies with design rules to ensure desired transmission line behaviour in a real design environment. A model having a closed neighborhood environment can be used as a stand-alone model of the core structure describing the transmission line behaviour in the actual design environment.

Abstract: Systems and methods for statistical simulation of on chip interconnect models are provided. In on embodiment, the method comprises creating a non-linear on chip interconnect simulation model from parameters associated with the silicon chip process manufacturing; pre-calculating a linear function from the non-linear simulation model; replacing increments of variable parameters with statistical parameters; and performing, preferably, a Monte Carlo or corner simulation using the linear function.

Abstract: Methods, systems and apparatus for modeling capacitance for a structure comprising a pair of long conductors surrounded by a dielectric material and supported by a substrate. In particular, the structure may be on-chip coplanar transmission lines over a conductive substrate operated at very high frequencies, such that the substrate behaves as a perfect dielectric. It is assumed that the surrounding dielectric material is a first dielectric with a first permittivity (e1) and the substrate is a second dielectric with a second permittivity (e2). A method models the capacitance (C1) for values of the first and second permittivity (e1, e2) based on known capacitance (C2) computed for a basis structure with the same first permittivity (e1) and a different second permittivity (e2). Extrapolation or interpolation formulae are suggested to model the sought capacitance (C1) through one or more known capacitances (C2).

Abstract: Location of mobile units in a wireless local area network is based on use of signal strength ratios and other criteria. In one embodiment absolute value of signal strength is used to derive a second value of location. The second value may be used as the location if the system is not calibrated and may also be used to calibrate the system. Alternatively time difference of arrival may be used in combination with signal strength ratio.

Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.