Patents by Inventor David Greco
David Greco has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8194085Abstract: A memory hub permits a graphics processor to access random access memories, such as dynamic random access memories (DRAMs). In one implementation, the memory hub permits an increase in effective memory bandwidth by aggregating the memory of two or more memories. In another implementation, the memory hub permits a graphics processor to offload memory access interfacing operations to the memory hub.Type: GrantFiled: December 3, 2008Date of Patent: June 5, 2012Assignee: Nvidia CorporationInventors: Joseph David Greco, Jonah M. Alben, Barry A. Wagner, Anthony Michael Tamasi
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Patent number: 8017520Abstract: An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer may define a frame with an outer periphery and an inner periphery.Type: GrantFiled: February 25, 2005Date of Patent: September 13, 2011Assignee: NVIDIA CorporationInventors: Inderjit Singh, Howard Lee Marks, Joseph David Greco
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Patent number: 7791193Abstract: An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer is meshed.Type: GrantFiled: November 20, 2007Date of Patent: September 7, 2010Assignee: NVIDIA CorporationInventors: Inderjit Singh, Howard Lee Marks, Joseph David Greco
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Patent number: 7649269Abstract: An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer may define a frame with an outer periphery and an inner periphery.Type: GrantFiled: November 20, 2007Date of Patent: January 19, 2010Assignee: NVIDIA CorporationInventors: Inderjit Singh, Howard Lee Marks, Joseph David Greco
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Publication number: 20090079748Abstract: A memory hub permits a graphics processor to access random access memories, such as dynamic random access memories (DRAMs). In one implementation, the memory hub permits an increase in effective memory bandwidth by aggregating the memory of two or more memories. In another implementation, the memory hub permits a graphics processor to offload memory access interfacing operations to the memory hub.Type: ApplicationFiled: December 3, 2008Publication date: March 26, 2009Applicant: NVIDIA CorporationInventors: Joseph David Greco, Jonah M. Alben, Barry A. Wagner, Anthony Michael Tamasi
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Patent number: 7495343Abstract: An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer may define a frame with an outer periphery and an inner periphery.Type: GrantFiled: July 31, 2003Date of Patent: February 24, 2009Assignee: NVIDIA CorporationInventors: Inderjit Singh, Howard Lee Marks, Joseph David Greco
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Patent number: 7477257Abstract: A memory hub permits a graphics processor to access random access memories, such as dynamic random access memories (DRAMs). In one implementation, the memory hub permits an increase in effective memory bandwidth by aggregating the memory of two or more memories. In another implementation, the memory hub permits a graphics processor to offload memory access interfacing operations to the memory hub.Type: GrantFiled: December 15, 2005Date of Patent: January 13, 2009Assignee: Nvidia CorporationInventors: Joseph David Greco, Jonah M. Alben, Barry A. Wagner, Anthony Michael Tamasi
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Patent number: 7453158Abstract: An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer is meshed.Type: GrantFiled: July 31, 2003Date of Patent: November 18, 2008Assignee: NVIDIA CorporationInventors: Inderjit Singh, Howard Lee Marks, Joseph David Greco
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Patent number: 7429528Abstract: An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer is meshed.Type: GrantFiled: January 28, 2005Date of Patent: September 30, 2008Assignee: NVIDIA CorporationInventors: Inderjit Singh, Howard Lee Marks, Joseph David Greco
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Patent number: 7408626Abstract: The transmitter for projecting a beam of laser light includes a source of a beam of laser light, and a projection arrangement for directing the beam of laser light at a selected grade. The transmitter further includes a temperature sensor for detecting the temperature of said transmitter, and a temperature correction circuit, including a look-up table, responsive to said temperature sensor, for adjusting said projection arrangement in dependence upon offset grade values that are stored in said look-up table for a plurality of transmitter temperatures. These offset grade values are separately determined on an empirical basis for each transmitter, such that temperatures induced errors in the direction of the beam of laser light are compensated.Type: GrantFiled: May 30, 2006Date of Patent: August 5, 2008Assignee: Trimble Navigation LimitedInventor: J. David Greco
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Patent number: 7095486Abstract: The transmitter for projecting a beam of laser light includes a source of a beam of laser light, and a projection arrangement for directing the beam of laser light at a selected grade. The transmitter further includes a temperature sensor for detecting the temperature of said transmitter, and a temperature correction circuit, including a look-up table, responsive to said temperature sensor, for adjusting said projection arrangement in dependence upon offset grade values that are stored in said look-up table for a plurality of transmitter temperatures. These offset grade values are separately determined on an empirical basis for each transmitter, such that temperatures induced errors in the direction of the beam of laser light are compensated.Type: GrantFiled: July 18, 2003Date of Patent: August 22, 2006Assignee: Trimble Navigation LimitedInventor: J. David Greco
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Patent number: 6885555Abstract: A cooling system for an electronic device includes an air flow conduit for causing air outside a housing of the device to flow through a heat dissipation device. The conduit is configured to prevent substantial transfer of heat from air contained within the conduit and air in the remainder of the housing. The conduit walls include thermal and/or acoustic insulation. One or more fans in the conduit draw outside air into the conduit and expel air in the conduit to outside the housing.Type: GrantFiled: March 6, 2003Date of Patent: April 26, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventor: David Greco
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Publication number: 20050060440Abstract: The present invention relates to computer systems. An embodiment provides an arrangement for a computer system; the arrangement comprising at least one terminal to provide dynamic information relating to an operating characteristic of the arrangement; and circuitry, using the at least one terminal, to produce an output signal bearing the dynamic information associated with the operating characteristic of the arrangement.Type: ApplicationFiled: July 2, 2004Publication date: March 17, 2005Inventors: Olivier Meynard, David Greco
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Publication number: 20050045914Abstract: A flip chip assembly machine (FCAM) (30) includes a main gantry (50) and a substrate camera gantry (40) that are configured to operate independently of each other and, respectively, support a die (12) and a substrate camera (38) for alignment purposes. The FCAM further includes a fluxer (130) for applying flux to the die. A flip-to-flux pick and place subassembly (116) picks up a die and places it in flux (46) independently of the operation of the main gantry, which may perform another task during the flux dwell time. A substrate carrier conveyor (154) includes a walking beam (260) to rapidly accelerate and decelerate substrate carrier movement into and out of the FCAM.Type: ApplicationFiled: July 8, 2004Publication date: March 3, 2005Applicant: Newport CorporationInventors: Edward Agranat, Matthew Bouche, Dennis Carew, Nicholas Celia, Michael Chalsen, Cyriac Devasia, Brian Evans, David Greco, Gheorghe Pascariu, Russell Wheeler
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Publication number: 20050047093Abstract: A CPU heat sink and cooling fan combination is provided which automatically establishes an electrical connection for the cooling fan when the combination in inserted into a chip board.Type: ApplicationFiled: August 29, 2003Publication date: March 3, 2005Inventors: Xavier Cohen, David Greco
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Publication number: 20040073822Abstract: The present invention relates to a data processing system and method having a reduced power consumption. A power context is established for each application task, process or thread running within a computer system. The power context controls the operating conditions of the processor by, for example, reducing the frequency of the processor clock or the operating voltage of the processor. A scheduler is used to switch between threads a, in horn, between power contexts associated with the threads. The switching is performed according to the conventional priority switching of threads by an operating system. However, since each tread has an associated power context, the performance of the processor, and hence the power consumption is varied on a time slot-by-time slot basis.Type: ApplicationFiled: April 3, 2003Publication date: April 15, 2004Applicant: Hewlett-Packard Development Company, L.P.Inventors: David Greco, Olivier Meynard, Vincent Nguyen-Quang Do
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Publication number: 20040004817Abstract: A cooling system for an electronic device includes an air flow conduit for causing air outside a housing of the device to flow through a heat dissipation device. The conduit is configured to prevent substantial transfer of heat from air contained within the conduit and air in the remainder of the housing. The conduit walls include thermal and/or acoustic insulation. One or more fans in the conduit draw outside air into the conduit and expel air in the conduit to outside the housing.Type: ApplicationFiled: March 6, 2003Publication date: January 8, 2004Inventor: David Greco
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Patent number: 6621560Abstract: The transmitter for projecting a beam of laser light includes a source of a beam of laser light, and a projection arrangement for directing the beam of laser light at a selected grade. The transmitter further includes a temperature sensor for detecting the temperature of said transmitter, and a temperature correction circuit, including a look-up table, responsive to said temperature sensor, for adjusting said projection arrangement in dependence upon offset grade values that are stored in said look-up table for a plurality of transmitter temperatures. These offset grade values are separately determined on an empirical basis for each transmitter, such that temperatures induced errors in the direction of the beam of laser light are compensated.Type: GrantFiled: January 9, 2002Date of Patent: September 16, 2003Assignee: Trimble Navigation LimitedInventor: J. David Greco
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Publication number: 20030128353Abstract: The transmitter for projecting a beam of laser light includes a source of a beam of laser light, and a projection arrangement for directing the beam of laser light at a selected grade. The transmitter further includes a temperature sensor for detecting the temperature of said transmitter, and a temperature correction circuit, including a look-up table, responsive to said temperature sensor, for adjusting said projection arrangement in dependence upon offset grade values that are stored in said look-up table for a plurality of transmitter temperatures. These offset grade values are separately determined on an empirical basis for each transmitter, such that temperatures induced errors in the direction of the beam of laser light are compensated.Type: ApplicationFiled: January 9, 2002Publication date: July 10, 2003Inventor: J. David Greco