Patents by Inventor David H. Danovitch
David H. Danovitch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8162199Abstract: An apparatus for the removal of excess solder or contaminant, which are encountered on the surfaces of injection mold prior to the transfer of a solder on a silicon wafer. More particularly, there is provided an apparatus for the removal of excess solder, which may be present on a mold surface, without removing any solder, which is located in cavities formed in the mold, and wherein the solder is applied through an injection molded soldering process.Type: GrantFiled: August 12, 2009Date of Patent: April 24, 2012Assignee: International Business Machines CorporationInventors: Eric E. Bourchard, Guy Brouillette, David H. Danovitch, Peter A. Gruber, Jean-Luc Landreville
-
Patent number: 7819376Abstract: A method for forming interconnects onto attachment points of a wafer includes the steps of providing a mold with a plurality of cavities having a predetermined shape, depositing a release agent on surfaces of the cavities, filling the cavities with an interconnect material to form the interconnects, removing the release agent from the mold, and attaching the interconnects to the attachment points of the wafer. An adhesive layer can optionally be deposited in addition to the release layer. The adhesive layer can be used, for example, to bond the chip to a package.Type: GrantFiled: October 31, 2007Date of Patent: October 26, 2010Assignee: International Business Machines CorporationInventors: David H. Danovitch, Mukta G. Farooq, Peter A. Gruber, John U. Knickerbocker, George R. Proto, Da-Yuan Shih
-
Publication number: 20090294090Abstract: An apparatus for the removal of excess solder or contaminant, which are encountered on the surfaces of injection mold prior to the transfer of a solder on a silicon wafer. More particularly, there is provided an apparatus for the removal of excess solder, which may be present on a mold surface, without removing any solder, which is located in cavities formed in the mold, and wherein the solder is applied through an injection molded soldering process.Type: ApplicationFiled: August 12, 2009Publication date: December 3, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Eric E. Bouchard, Guy Brouillette, David H. Danovitch, Peter A. Gruber, Jean-Luc Landreville
-
Publication number: 20080175939Abstract: A method for forming interconnects onto attachment points of a wafer includes the steps of providing a mold with a plurality of cavities having a predetermined shape, depositing a release agent on surfaces of the cavities, filling the cavities with an interconnect material to form the interconnects, removing the release agent from the mold, and attaching the interconnects to the attachment points of the wafer. An adhesive layer can optionally be deposited in addition to the release layer. The adhesive layer can be used, for example, to bond the chip to a package.Type: ApplicationFiled: October 31, 2007Publication date: July 24, 2008Applicant: International Business Machines CorporationInventors: David H. Danovitch, Mukta G. Farooq, Peter A. Gruber, John U. Knickerbocker, George R. Proto, Da-Yuan Shih
-
Publication number: 20080156849Abstract: An apparatus and a method for the removal of excess solder or contaminant, which are encountered on the surfaces of injection mold prior to the transfer of a solder on a silicon wafer. More particularly, there is provided for the removal of excess solder, which may be present on a mold surface, without removing any solder, which is located in cavities formed in the mold, and wherein the solder is applied through an injection molded soldering process.Type: ApplicationFiled: January 3, 2007Publication date: July 3, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Eric E. Bouchard, Guy Brouillette, David H. Danovitch, Peter A. Gruber, Jean-Luc Landreville
-
Patent number: 7348270Abstract: A method for forming interconnects onto attachment points of a wafer includes the steps of providing a mold with a plurality of cavities having a predetermined shape, depositing a release agent on surfaces of the cavities, filling the cavities with an interconnect material to form the interconnects, removing the release agent from the mold, and attaching the interconnects to the attachment points of the wafer. An adhesive layer can optionally be deposited in addition to the release layer. The adhesive layer can be used, for example, to bond the chip to a package.Type: GrantFiled: January 22, 2007Date of Patent: March 25, 2008Assignee: International Business Machines CorporationInventors: David H. Danovitch, Mukta G. Farooq, Peter A. Gruber, John U. Knickerbocker, George R. Proto, Da-Yuan Shih
-
Patent number: 6566612Abstract: A method for direct chip attach of a semiconductor chip to a circuit board by using solder bumps and an underfill layer is disclosed. In the method, a layer of in-situ polymeric mold material is first screen printed on the top surface of the semiconductor chip exposing a multiplicity of bond pads. The in-situ polymeric mold layer is formed with a multiplicity of apertures which are then filled with solder material in a molten solder screening process to form solder bumps. A thin flux-containing underfill material layer is then placed on top of a circuit board over a plurality of conductive pads which are arranged in a mirror image to the bond pads on the semiconductor chip. The semiconductor chip and the circuit board are then pressed together with the underfill layer inbetween and heated to a reflow temperature of higher than the melting temperature of the solder material until electrical communication is established between the bond pads and the conductive pads.Type: GrantFiled: January 22, 2002Date of Patent: May 20, 2003Assignee: International Business Machines CorporationInventors: Guy P. Brouillette, David H. Danovitch, Peter A. Gruber, Michael Liehr, Carlos J. Sambucetti
-
Publication number: 20020062556Abstract: A method for direct chip attach of a semiconductor chip to a circuit board by using solder bumps and an underfill layer is disclosed. In the method, a layer of in-situ polymeric mold material is first screen printed on the top surface of the semiconductor chip exposing a multiplicity of bond pads. The in-situ polymeric mold layer is formed with a multiplicity of apertures which are then filled with solder material in a molten solder screening process to form solder bumps. A thin flux-containing underfill material layer is then placed on top of a circuit board over a plurality of conductive pads which are arranged in a mirror image to the bond pads on the semiconductor chip. The semiconductor chip and the circuit board are then pressed together with the underfill layer inbetween and heated to a reflow temperature of higher than the melting temperature of the solder material until electrical communication is established between the bond pads and the conductive pads.Type: ApplicationFiled: January 22, 2002Publication date: May 30, 2002Applicant: International Business Machines CorporationInventors: Guy P. Brouillette, David H. Danovitch, Peter A. Gruber, Michael Liehr, Carlos J. Sambucetti
-
Patent number: 6341418Abstract: A method for direct chip attach of a semiconductor chip to a circuit board by using solder bumps and an underfill layer is disclosed. In the method, a layer of in-situ polymeric mold material is first screen printed on the top surface of the semiconductor chip exposing a multiplicity of bond pads. The in-situ polymeric mold layer is formed with a multiplicity of apertures which are then filled with solder material in a molten solder screening process to form solder bumps. A thin flux-containing underfill material layer is then placed on top of a circuit board over a plurality of conductive pads which are arranged in a mirror image to the bond pads on the semiconductor chip. The semiconductor chip and the circuit board are then pressed together with the underfill layer inbetween and heated to a reflow temperature of higher than the melting temperature of the solder material until electrical communication is established between the bond pads and the conductive pads.Type: GrantFiled: April 29, 1999Date of Patent: January 29, 2002Assignee: International Business Machines CorporationInventors: Guy P. Brouillette, David H. Danovitch, Peter A. Gruber, Michael Liehr, Carlos J. Sambucetti
-
Patent number: 5202943Abstract: An optoelectronic assembly which provides for enhanced alignment between the internal components thereof. The assembly includes a housing having a base portion and a cover portion, the housing including therein a circuitized substrate. A pair of optoelectronic devices (transmitter and receiver components) are initially movably (loosely) positioned within the housing. The invention utilizes an alignment member which is secured to the housing while positively engaging the movably positioned devices and precisely align these devices with respect thereto such that these devices are in turn precisely aligned with optic means (e.g., a duplex optical connector) when the optic means is positioned within the alignment member. In one embodiment, the housing is of metallic material while the alignment member is a molded plastic structure. The alignment member may also include shutter means therein for safety purposes.Type: GrantFiled: October 4, 1991Date of Patent: April 13, 1993Assignee: International Business Machines CorporationInventors: Gary R. Carden, David H. Danovitch, Eric M. Foster, William W. Vetter