Abstract: Embodiments feature a circuit that includes a first set of differential switches to generate a first mixer output. The first set includes source terminals, a differential input terminal, gate terminals, and first mixer output terminals. For the first set, the source terminals are coupled to the differential input terminal and the gate terminals are coupled to a first differential oscillator input. The circuit includes a second set of differential switches to generate a second mixer output. The second set of differential switches has source terminals, gate terminals, and second mixer output terminals. For the second set of differential switches, the source terminals of the second set of differential switches are coupled to the first mixer output terminals to receive the first mixer output and the gate terminals of the second set of differential switches are coupled to a second differential oscillator input. The second mixer output terminals couple a filter.

Abstract: Embodiments feature techniques and systems for digitally tuning a crystal oscillator circuit. In one aspect, embodiments feature a method for making a digitally tuned crystal oscillator circuit. The method involves receiving a multi-bit input signal into a digital modulator, modulating the multi-bit input signal with the digital modulator by oversampling or by noiseshaping and oversampling to produce a digitally-modulated output signal having a lower number of bits than the multi-bit input signal. The method also involves coupling a tuning capacitor with the crystal oscillator circuit, and coupling the digitally-modulated output signal from the digital modulator to the crystal oscillator circuit and the tuning capacitor. In some embodiments, the digital modulator can a delta-sigma modulator, a noiseshaping modulator, a delta modulator, a pulse width modulator, a differential modulator, or a continuous-slope delta modulator.

Abstract: A charge pump replica bias detector is disclosed which provides a charge pump with a greater working output voltage range or larger output compliance. A larger working range will provide a charge pump with more symmetric source and sink currents than prior designs with a reduction of the multiple frequency sideband levels that occur in a voltage controlled oscillator of a phase-locked loop synthesizer. Further improvements are the prevention of disturbances of the loop filter voltage level due to unwanted leakage currents in a charge pump that are dependent on the value of loop filter voltage. Finally, by providing improved output voltage compliance and limiting loop filter voltage disturbances there are improvements in the reduction in reference frequency feed-through, charge sharing and noise transient coupling and phase noise in the phase-locked loop.

Abstract: Particular embodiments of mixer designs permit greater integration on standard chips with an improvement in power and linearity to enable low-power, high-performance reception. Some embodiments feature a method of frequency conversion using at least two stages of switches to mix an input signal with reference signals. The method involves mixing a differential input signal with a first differential reference signal through a first stage of switches, generating from the first stage of switches a first frequency converted differential signal, and mixing the first frequency converted differential signal with a second differential reference signal through a second stage of switches. The method includes generating from the second stage of switches a second frequency converted differential signal. The first differential reference signal can be phase shifted from the second differential reference signal and can have a different frequency.

Abstract: A multiple frequency RF communications receiver is disclosed which permits greater integration on standard silicon chips and consumes less power than previous receivers. A new method for selecting the various frequency bands with a high amount of isolation and low power consumption is described. Compared to previous receiver implementations, there is no loss of selectivity in the receiver.

Abstract: A mixer design is described that permits greater integration on standard silicon chips with an improvement in power and linearity compared to previous mixer designs, enabling low-power, high performance RF reception.

Abstract: A charge pump is disclosed which generates higher and more symmetric source and sink currents that prior designs and reduces the multiple frequency sidebands that occur in a voltage controlled oscillator of a phase-loop synthesizer. Other improvements are the reduction in reference frequency feed-through, charge sharing and noise transient coupling and phase noise in the phase-locked loop. Possible applications include but are not limited to charge pump phase-locked designs for single chip CMOS multi-band and multi-standard radio frequency integrated circuits.

Abstract: A method for tuning a high quality resonant circuit based on bonding wire inductors and tunable capacitors is disclosed which permits greater integration on standard silicon chips and greater insensitivity to manufacturing and ambient temperature variations. The L-C resonant circuit is tuned by a phase-locked loop with an L-C based VCO. Bonding wire inductors can be used in the resonant circuit in order to enhance the quality factor, and manufacturing variations of the bonding wire inductors are compensated by the tuning circuit. The L-C resonant circuit can be operated continuously with the tuning circuit turned off.

Abstract: An analog equalization filter is disclosed which permits higher speed and linearity than existing designs, allowing for filtering operation to the hundreds of gigahertz range. Possible applications include fixed and adaptive equalization filtering and radio frequency filtering. The filter can be entirely implemented on an integrated circuit chip. The filter is based on transmission line based delay elements and transconductance amplifiers.

Abstract: A subharmonic mixer design is described that permits greater integration on standard silicon chips with an improvement in power and linearity compared to previous mixer designs, enabling low-power, high performance RF reception.

Abstract: A multiple frequency RF communications receiver is disclosed which permits greater integration on standard silicon chips and consumes less power than previous receivers. A new method for selecting the various frequency bands with a high amount of isolation and low power consumption is described. Compared to previous receiver implementations, there is no loss of selectivity in the receiver.

Abstract: The high dynamic range mixer is disclosed which enables wideband frequency translation of radio frequency signals and particularly suited for radio with zero-IF or low-IF receiver architectures, as the dynamic range requirements on the mixers in these radios are particularly severe.

Abstract: A high quality resonant circuit that can easily be integrated into an integrated circuit package or substrate is disclosed. The resonant circuit is based on a transmission line impedance transformation property, which allows the resonant circuit to have higher quality factor than existing integrated L-C implementations.

Abstract: A RF communications receiver is disclosed which permits greater integration on standard silicon chips and consumes less power than previous receivers. A new method for using a tracking intermediate frequency filter for a variable intermediate frequency receiver ensures good performance over an entire received frequency band.

Abstract: A RF communications receiver is disclosed which permits greater integration on standard silicon chips and consumes less power than previous receivers. A new method for using a tracking polyphase filter for image rejection of variable intermediate frequencies is introduced. This method allows for reduce sensitivity to resistor and capacitor manufacturing variations and allows for the polyphase filter response to be enhanced compared to the prior art.

Abstract: A method for tuning an on-chip L-C filter is disclosed which permits greater integration on standard silicon chips and greater insensitivity to manufacturing and ambient temperature variations. The L-C filter is tuned by a phase-locked loop with a L-C based VCO. The tuning loop can be powered down to save power and reduce noise coupling. The L-C filter can be operated continuously.

Abstract: A circuit and method for preventing latch-up in a CMOS semiconductor device. In an n-type substrate and p-type well region semiconductor, the method comprises the steps of pulling V.sub.sub of the substrate terminal to V.sub.CC and pulling V.sub.well of the well region terminal to V.sub.SS when V.sub.CC is below a predetermined voltage V.sub.det, and releasing V.sub.CC and V.sub.SS from respective substrate and well region terminals when V.sub.CC rises above V.sub.det. Or, if V.sub.CC is above both V.sub.det and V.sub.sub then pulling V.sub.sub to V.sub.CC and pulling V.sub.well to V.sub.SS. If V.sub.CC is above V.sub.det but below V.sub.sub then pulling V.sub.well below V.sub.SS. Similarly, in a p-type substrate and n-type well region semiconductor, the method comprises the steps of pulling V.sub.sub of the substrate terminal to V.sub.SS and pulling V.sub.well of the well region terminal to V.sub.CC when V.sub.CC is below a predetermined voltage V.sub.det, and releasing V.sub.SS and V.sub.

Abstract: A high-speed current-sensing amplifier using process-insensitive matching of devices to determine the state of a bistable SRAM cell. The benefits include small voltage swings on heavily capacitively loaded bit lines and bit line bars during memory sensing, thereby maximizing the speed of the SRAM device. One embodiment uses a negative feedback amplifier minimize the bit line and bit line bar voltage swings while sensing current through matched PMOS transistors. Another embodiment uses cascoded PMOS devices to limit the swing of the bit lines and bit line bars, and a supply voltage and process-compensated voltage reference source to set the common-mode voltage of matched resistive sense elements. In all cases power on and off circuitry minimize the power of the memory device.

Abstract: An RF communications receiver permits greater integration on standard silicon chips and consumes less power than previous receivers. Sub-sampling and discrete-time signal processing techniques are used to frequency down-convert, filter, amplify, and select a desired analog RF channel. A sample-and-hold circuit sub-samples the desired analog RF channel of carrier frequency f.sub.c, thereby down-converting it to a discrete-time image signal of frequency f.sub.i. Successive down-sampling, anti-alias filtering, and amplification of the discrete-time image signal yield a low-frequency discrete-time signal containing a down-converted channel of frequency f.sub.k. The low-frequency discrete-time signal is then digitized, filtered, and demodulated to reveal its baseband information content.

Abstract: Dendrites are prevented from shorting a secondary lithium battery by use of a first porous separator such as porous polypropylene adjacent the lithium anode that is unreactive with lithium and a second porous fluoropolymer separator between the cathode and the first separator such as polytetrafluoroethylene that is reactive with lithium. As the tip of a lithium dendrite contacts the second separator, an exothermic reaction occurs locally between the lithium dendrite and the fluoropolymer separator. This results in the prevention of the dendrite propagation to the cathode.