Abstract: The invention is a defect tolerant memory for a computer system. The defect tolerant memory has a main memory, a redundant memory and a mask memory. The redundant memory receives and stores data redundant to that addressed to defective cells in the main memory. The redundant memory has multiple memory levels and uses a randomness technique to store redundant data for all chips of the main memory. The mask memory stores the location of each defect of main memory and indicates when a defective word is addressed in main memory. The mask memory is made up of multiple bit mask memories each cooperating with one of the redundant memory levels. Each bit-mask memory has multiple sub-memory units which use a randomness technique to store the addresses of defects in main memory.

Abstract: A system for interfacing a plurality of stations with a shared device by granting access to the device in the order of requests from the stations. The system elements are serially interconnected for bidirectional communication between the stations and the shared device. Each station employs a register to store a value representing the relative access priority of that station for the shared device. Whenever a station seeks access to the shared device its register is reset to zero and a count-up signal is propagated to all other waiting stations to cause them to increment the values in their registers. When the shared device again becomes available for access the values in the registers are transferred within each station to race counters where they are counted up by a clock until one of the terminals reaches a predetermined maximum count and is granted access to the shared device.

Abstract: A computer terminal for providing a visual display of linguistic characters in response to character data information from an external computer. The computer display terminal can be semipermanently configured in response to externally supplied configuration information. The terminal includes a microprocessor unit formed by a microprocessor, a ROM for instruction codes and a RAM for temporary data storage. A data communications channel interfaces with the microprocessor unit, receives the character information from the external computer, and provides such information to the microprocessing unit for storage in its RAM. A CRT or other display interfaces with the microprocessor unit and visually displays character information stored in the RAM. A keyboard or other input interfaces with the microprocessor unit and provides a means for inputting externally supplied terminal configuration information.