Patents by Inventor David Harold Surman

David Harold Surman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230043202
    Abstract: A query operation is performed to obtain information for a select entity of a computing environment. The information includes boost information of one or more boost features currently available for the select entity. The one or more boost features are to be used to temporarily adjust one or more processing attributes of the select entity. The boost information obtained from performing the query operation is provided in an accessible location to be used to perform one or more actions to facilitate processing in the computing environment.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Inventors: Omkar Ulhas Javeri, David Harold Surman, Seth E. Lederer, Peter Jeremy Relson, Jonathan D. Bradbury, Hunter J. Kauffman, Martin Stock, Brent J. Boisvert
  • Publication number: 20230030241
    Abstract: A buffer summary group of a plurality of buffer summary groups is accessed. The buffer summary group includes one or more summary indicators for one or more buffers assigned to the buffer summary group. A summary indicator of the one or more summary indicators of the buffer summary group is checked to determine whether an event has occurred for at least one buffer of the one or more buffers assigned to the buffer summary group. Based on the checking indicating that the event has occurred, one or more actions are performed.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Inventors: Peter Dana Driever, David Harold Surman, Peter Kenneth Szwed, Andrew Walter Piechowski, Steven Neil Goss
  • Publication number: 20230036467
    Abstract: A vector entry of a signaling vector is registered to a buffer summary group. The buffer summary group includes one or more summary indicators for one or more buffers assigned to the buffer summary group. A command is processed that sets a vector indicator in the vector entry and based on setting the vector indicator in the vector entry, a summary indicator of the one or more summary indicators is set in the buffer summary group.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Inventors: Peter Dana Driever, David Harold Surman, Peter Kenneth Szwed, Andrew Walter Piechowski, Steven Neil Goss
  • Patent number: 7120746
    Abstract: Disclosed is a system, method, and program for transferring data. When a transaction commits, multiple data objects that have been changed by the transaction are identified. The multiple data objects are written from local storage to a cache structure using a batch write command. When changed data objects at a first system that are not cached in the shared external storage are written to disk, a batch cross invalidation command is used to invalidate the data objects at a second system. Additionally, multiple data objects are read from the cache structure into a processor storage using a batch castout command.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Campbell, David Arlen Elko, Jeffrey William Josten, Haakon Philip Roberts, David Harold Surman
  • Publication number: 20040049636
    Abstract: Disclosed is a system, method, and program for transferring data. When a transaction commits, multiple data objects that have been changed by the transaction are identified. The multiple data objects are written from local storage to a cache structure using a batch write command. When changed data objects at a first system that are not cached in the shared external storage are written to disk, a batch cross invalidation command is used to invalidate the data objects at a second system. Additionally, multiple data objects are read from the cache structure into a processor storage using a batch castout command.
    Type: Application
    Filed: September 9, 2002
    Publication date: March 11, 2004
    Applicant: International Business Machines Corporation
    Inventors: John Joseph Campbell, David Arlen Elko, Jeffrey William Josten, Haakon Philip Roberts, David Harold Surman
  • Patent number: 6539495
    Abstract: Coupling facility store-in cache structures are duplexed in order to improve data availability. That is, once duplexing is established, selective data is written to both a primary structure instance and a secondary structure instance. Thus, if one of the structure instances fails, then the other structure instance is used in order to prevent data from being lost. Duplexing can be started manually and/or automatically by the operating system. Further, a structure may be removed from duplex mode and enter simplex mode, if duplexing is not desired.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: March 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: David Arlen Elko, Steven Bruce Jones, Jeffrey W. Josten, Inderpal Singh Narang, Jeffrey M. Nick, Kelly B. Pushong, David Harold Surman, James Zu-Chia Teng
  • Patent number: 6438654
    Abstract: Castout processing for duplexed data structures. A selective data item is written from a primary instance of a data structure to at least one storage medium. A determination is made as to whether the selective data item can be deleted from a secondary instance of the data structure. If the selective data item can be deleted, it is deleted from the secondary instance.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: August 20, 2002
    Assignee: International Business Machines Corporation
    Inventors: David Arlen Elko, Steven Bruce Jones, Jeffrey W. Josten, Inderpal Singh Narang, Jeffrey M. Nick, Kelly B. Pushong, David Harold Surman, James Zu-Chia Teng
  • Patent number: 6233644
    Abstract: A lock structure, which includes many entries, is partitioned into segments. A number of the segments are cleaned up in parallel, such that cleanup processing of the entire lock structure is optimized. The lock structure is maintained within a coupling facility, which provides access to the lock structure by one or more processors coupled to the coupling facility. The cleaning up of the lock structure is performed by commands driven by the one or more processors and executed within the coupling facility.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: May 15, 2001
    Assignee: International Business Machines Corporation
    Inventors: Dennis J. Dahlen, Jeffrey Mark Nick, David Harold Surman, Douglas W. Westcott
  • Patent number: 6185562
    Abstract: A lock structure, which includes many entries, is partitioned into segments. A number of the segments are cleaned up in parallel, such that cleanup processing of the entire lock structure is optimized. The lock structure is maintained within a coupling facility, which provides access to the lock structure by one or more processors coupled to the coupling facility. The cleaning up of the lock structure is performed by commands driven by the one or more processors and executed within the coupling facility.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: February 6, 2001
    Assignee: International Business Machines Corporation
    Inventors: Dennis J. Dahlen, Jeffrey Mark Nick, David Harold Surman, Douglas W. Westcott
  • Patent number: 6178421
    Abstract: A lock structure, which includes many entries, is partitioned into segments. A number of the segments are cleaned up in parallel, such that cleanup processing of the entire lock structure is optimized. The lock structure is maintained within a coupling facility, which provides access to the lock structure by one or more processors coupled to the coupling facility. The cleaning up of the lock structure is performed by commands driven by the one or more processors and executed within the coupling facility.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: January 23, 2001
    Assignee: International Business Machines Corporation
    Inventors: Dennis J. Dahlen, Jeffrey Mark Nick, David Harold Surman, Douglas W. Westcott
  • Patent number: 5887135
    Abstract: Two or more user applications executing on one or more processors, each controlled by an operating system, share use of a list and subsidiary list structure within a Structured External Storage (SES) facility to which each processor is connected. One of the applications registers interest in particular state transitions affecting one or more subsidiary lists within the list structure, causing a process within the SES to notify the appropriate processor when a list operation causes the particular state transition, without interrupting processing on the processor. The application receives notice of the state transition by periodically polling a vector within the processor, or by receiving control when a test by the operating system of a summary indicator for the vector causes an application exit to be driven.
    Type: Grant
    Filed: August 15, 1996
    Date of Patent: March 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: Dennis James Dahlen, Audrey Ann Helffrich, Jeffrey Mark Nick, David Harold Surman, Michael Dustin Swanson