Patents by Inventor David J. Brownell

David J. Brownell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9322889
    Abstract: An MTJ sensor having low hysteresis and high sensitivity is disclosed. The MTJ sensor includes, in one embodiment, a bridge with first and second active MTJ elements and first and second passive MTJ elements connected in a Wheatstone bridge configuration. First and second magnetic shield elements are located over the first and second passive MTJ elements and form a gap therebetween that concentrates magnetic flux toward the first and second active MTJ elements. A three-dimensional coil is wound around the first and second magnetic shield elements with over-windings located over the first and second magnetic shield elements and under-windings located under the first and second magnetic shield elements, connected together by a plurality of vias adjacent the first and second magnetic shield elements.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: April 26, 2016
    Assignee: NVE Corporation
    Inventors: Catherine Ann Nordman, Peter Eames, Russ Beech, David J. Brownell
  • Publication number: 20130169271
    Abstract: An MTJ sensor having low hysteresis and high sensitivity is disclosed. The MTJ sensor includes, in one embodiment, a bridge with first and second active MTJ elements and first and second passive MTJ elements connected in a Wheatstone bridge configuration. First and second magnetic shield elements are located over the first and second passive MTJ elements and form a gap therebetween that concentrates magnetic flux toward the first and second active MTJ elements. A three-dimensional coil is wound around the first and second magnetic shield elements with over-windings located over the first and second magnetic shield elements and under-windings located under the first and second magnetic shield elements, connected together by a plurality of vias adjacent the first and second magnetic shield elements.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Applicant: NVE CORPORATION
    Inventors: Catherine Ann Nordman, Peter Eames, Russ Beech, David J. Brownell
  • Patent number: 7609054
    Abstract: A ferromagnetic thin-film based magnetic field detection system having a substrate supporting a magnetic field sensor in a channel with a first electrical conductor supported on the substrate positioned at least in part along the channel gap and in direct contact with at least some surface of the magnetic field sensor ands a second electrical conductor supported on the substrate positioned at least in part along the channel gap in a region thereof adjacent to, but separated from, the magnetic field sensor.
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: October 27, 2009
    Assignee: NVE Corporation
    Inventors: Mark C. Tondra, John M. Anderson, David J. Brownell, Anthony D. Popple
  • Publication number: 20080218157
    Abstract: A ferromagnetic thin-film based magnetic field detection system having a substrate supporting a magnetic field sensor in a channel with a first electrical conductor supported on the substrate positioned at least in part along the channel gap and in direct contact with at least some surface of the magnetic field sensor and a second electrical conductor supported on the substrate positioned at least in part along the channel gap in a region thereof adjacent to, but separated from, the magnetic field sensor.
    Type: Application
    Filed: May 13, 2008
    Publication date: September 11, 2008
    Applicant: NVE Corporation
    Inventors: Mark C. Tondra, John M. Anderson, David J. Brownell, Anthony D. Popple
  • Patent number: 7391091
    Abstract: A ferromagnetic thin-film based magnetic field detection system having a substrate supporting a magnetic field sensor in a channel with a first electrical conductor supported on the substrate positioned at least in part along the channel gap and in direct contact with at least some surface of the magnetic field sensor ands a second electrical conductor supported on the substrate positioned at least in part along the channel gap in a region thereof adjacent to, but separated from, the magnetic field sensor.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: June 24, 2008
    Assignee: NVE Corporation
    Inventors: Mark C. Tondra, John M. Anderson, David J. Brownell, Anthony D. Popple
  • Patent number: 6518591
    Abstract: Methods for monitoring defects in a process for forming a contact hole, via or trench in a layer of a device in an integrated circuit includes the steps of forming a sacrificial topology on a substrate by duplicating at least a portion of a structure of the device while substituting a material substantially free of elemental silicon for any elemental silicon present in the device to be monitored, etching the sacrificial topology at least to the substrate, removing at least a portion of the sacrificial topology, and inspecting the substrate using a wafer surface inspection tool. The substituted material, such as a dielectric material, can be easily etched and removed from the substrate, as compared to polysilicon. The etching step preferably creates an indentation in the substrate that is readily detectable by the wafer surface inspection tool. The etching step is preferably a selective etching step, having a selectivity of at least 10:1.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: February 11, 2003
    Assignee: Cypress Semiconductor Corporation
    Inventors: Edward M. Shamble, Thomas Boonstra, David J. Brownell, David A. Crow
  • Patent number: 6121156
    Abstract: Methods for monitoring defects in a process for forming a contact hole, via or trench in a layer of a device in an integrated circuit includes the steps of forming a sacrificial topology on a substrate by duplicating at least a portion of a structure of the device while substituting a material substantially free of elemental silicon for any elemental silicon present in the device to be monitored, etching the sacrificial topology at least to the substrate, removing at least a portion of the sacrificial topology, and inspecting the substrate using a wafer surface inspection tool. The substituted material, such as a dielectric material, can be easily etched and removed from the substrate, as compared to polysilicon. The etching step preferably creates an indentation in the substrate that is readily detectable by the wafer surface inspection tool. The etching step is preferably a selective etching step, having a selectivity of at least 10:1.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: September 19, 2000
    Assignee: Cypress Semiconductor Corporation
    Inventors: Edward M. Shamble, Thomas Boonstra, David J. Brownell, David A. Crow
  • Patent number: 4979012
    Abstract: A semiconductor device having a metal interconnect feature which comprises an array of metal features. Each of the metal features in the array has a size not substantially larger than a predetermined feature size. The metal features in the array are connected together by a metal layer deposited over the array of metal features.
    Type: Grant
    Filed: November 21, 1989
    Date of Patent: December 18, 1990
    Assignee: Honeywell Inc.
    Inventor: David J. Brownell
  • Patent number: 4797375
    Abstract: Disclosed is a method of fabricating a semiconductor device comprising the step of defining metal interconnect features in a metal layer so that a metal feature having a size substantially larger than a predetermined feature size comprises an array of metal features. Each of the metal features in the array has a size not substantially larger than the predetermined feature size.
    Type: Grant
    Filed: April 9, 1987
    Date of Patent: January 10, 1989
    Assignee: Honeywell Inc.
    Inventor: David J. Brownell
  • Patent number: 4642162
    Abstract: A method is disclosed for the planarization of a semiconductor device structure by a two stage planarization process which comprises: applying a dielectric layer over a first conductive layer, spin coating an organic layer onto the first dielectric layer, etching the device in a plasma etching process to substantially remove the organic planarization layer, then etching the device in a plasma etching process which etches the exposed dielectric layer to substantially remove all of it, removing the remaining organic planarization layer, followed by the application of a second dielectric layer under bias sputter deposition conditions. The bias sputter deposition fills trenches and eliminates peaks in the remaining first dielectric layer as it builds up the second dielectric layer. The process planarizes the dielectric layer without thickness variations dependent upon conductor layer pattern density.
    Type: Grant
    Filed: January 2, 1986
    Date of Patent: February 10, 1987
    Assignee: Honeywell Inc.
    Inventors: David J. Brownell, Daniel C. Christensen, David G. Erie, Daniel Youngner
  • Patent number: 4515668
    Abstract: The present invention comprises a method of forming a thin film dielectric layer on a substrate. The method comprises providing a sputtering chamber having a dielectric target disposed on a target electrode. A substrate to be covered with a thin film dielectric layer is introduced into the sputtering chamber and the substrate is located on a substrate holder electrode spaced from the target electrode. The chamber is then evacuated, and a sputtering atmosphere comprising an inert gas and a gas containing an element of a gettering material is introduced into the chamber. The gas containing an element of a gettering material is transferred into the chamber through a metering valve from a container outside the chamber. An RF potential is applied across the target electrode and the substrate electrode to establish a glow discharge in the region between the electrodes. Finally, a thin film dielectric layer doped with a gettering material is formed by a chemical reaction in the chamber.
    Type: Grant
    Filed: April 25, 1984
    Date of Patent: May 7, 1985
    Assignee: Honeywell Inc.
    Inventors: David J. Brownell, Jon A. Roberts