Abstract: Integrated circuit design often involves combination of blocks of circuit from different sources to create new designs. However, a simulation of a block developed using a given method may not be compatible with another simulation created using another method. A method for modifying hardware simulation having one internal timing regime to enable interoperation with another simulation having a different internal timing regime is described. In particular, it involves modification of models in a domain in which variables are used so that they are interoperable with models in a domain using signals.

Abstract: A method for converting a hardware description language describing an integrated circuit or software operating thereon to an alternative programming language, such as ANSI C, C++, Java, or other object-oriented programming language, is described. The method provides for the single compilation operations as well as the ability to link multiple compilations to simulate large hardware description language designs. The method of the present invention improves the run time efficiency of the compiled code in a more user-friendly format.

Abstract: A method for converting a hardware description language describing an integrated circuit or software operating thereon to an alternative programming language, such as ANSI C, C++, Java, or other object-oriented programming language, is described. The method provides for the single compilation operations as well as the ability to link multiple compilations to simulate large hardware description language designs. The method of the present invention improves the run time efficiency of the compiled code in a more user-friendly format.

Abstract: An ATM subnetwork, suitable for a low-cost home area network, comprises an interconnected mesh of simple ATM switches, end stations and multi-access buses implemented in fully-hardware configurations. Software for signalling and management functions does not reside in these devices, but rather is banished to computers outside the interconnected mesh. Specifically, an external controller acts a proxy for the simple ATM switches and performs all virtual channel connection set-up within the interconnected mesh. Additionally, proxy controllers manage each simple end station and proxy signalling agents permit standard ATM devices to be connected to the simple switches. These proxy processes communicate with the devices within the interconnected mesh via a control protocol of single cell messages delivered over dedicated permanent virtual circuits.

Abstract: A method for compensating for a running phase error due to unsynchronized clocks which can be applied to Discrete Multitone Communication (DMT) and xDSL, to m-arry PSK and to QPSK

Abstract: An ATM subnetwork, suitable for a low-cost home area network, comprises an interconnected mesh of simple ATM switches, end stations and multi-access buses implemented in fully-hardware configurations. Software for signalling and management functions does not reside in these devices, but rather is banished to computers outside the interconnected mesh. Specifically, an external controller acts a proxy for the simple ATM switches and performs all virtual channel connection set-up within the interconnected mesh. Additionally, proxy controllers manage each simple end station and proxy signalling agents permit standard ATM devices to be connected to the simple switches. These proxy processes communicate with the devices within the interconnected mesh via a control protocol of single cell messages delivered over dedicated permanent virtual circuits.