Abstract: A system is disclosed that includes a wireless power receiver, a battery charging system coupled to the wireless power receiver and configured to charge a battery using power received from the wireless power receiver and a wireless data communication system coupled to the wireless power receiver and the battery charging system, the wireless data communication system configured to determine a power requirement and to transmit the power requirement using the wireless power receiver.

Abstract: A system is disclosed that includes a wireless power receiver, a battery charging system coupled to the wireless power receiver and configured to charge a battery using power received from the wireless power receiver and a wireless data communication system coupled to the wireless power receiver and the battery charging system, the wireless data communication system configured to determine a power requirement and to transmit the power requirement using the wireless power receiver.

Abstract: An apparatus includes a motor driver configured to drive a motor across a pair of input terminals to the motor and a current sense unit configured to sense the motor's electrical current amplitude. Further, an angular frequency extractor is operatively coupled to the motor driver and the current sense unit and configured to detect discontinuities in the motor's electrical current amplitude. The angular frequency extractor also is configured to determine a time period for one complete revolution of a rotor of the motor and to generate a feedback signal based on the determined period to control an angular frequency of the motor. The feedback signal may be used to adjust how the motor is being driven (e.g., to slow the motor down or speed it up).

Abstract: A switch includes a power transistor configured to switch an input voltage to a load. The switch further includes a charge pump and a duty cycle controller. The charge pump is coupled to the power transistor and includes an enable input to cause the charge pump to be turned on and off. The duty cycle controller is coupled to the charge pump and is configured to duty cycle the charge pump based on a comparison of a signal of a gate of the power transistor to a reference signal.

Abstract: A switch includes a power transistor configured to switch an input voltage to a load. The switch further includes a charge pump and a duty cycle controller. The charge pump is coupled to the power transistor and includes an enable input to cause the charge pump to be turned on and off. The duty cycle controller is coupled to the charge pump and is configured to duty cycle the charge pump based on a comparison of a signal of a gate of the power transistor to a reference signal.

Abstract: An apparatus includes a motor driver configured to drive a motor across a pair of input terminals to the motor and a current sense unit configured to sense the motor's electrical current amplitude. Further, an angular frequency extractor is operatively coupled to the motor driver and the current sense unit and configured to detect discontinuities in the motor's electrical current amplitude. The angular frequency extractor also is configured to determine a time period for one complete revolution of a rotor of the motor and to generate a feedback signal based on the determined period to control an angular frequency of the motor. The feedback signal may be used to adjust how the motor is being driven (e.g., to slow the motor down or speed it up).

Abstract: The present disclosure provides a reference one time programmable (OTP) cell, wherein the reference OTP cell can generate a reference bias current in at least a programmed-on configuration; a current mirror coupled to an output of the OTP cell, wherein the current mirror includes at least two gate-coupled field effect transistors (FETs); wherein a current gain of a second of the two FETS is a fraction less than one of a first of the at least two gate-coupled FETs; a programmable OTP memory bit element (OTPMBE) coupled to an input of the current mirror; and a comparator having an input coupled to a node between the OTPMBE and the current mirror.

Abstract: A high-voltage driver amplifier for piezo haptics comprises an input amplifier having a gain greater than one, a first amplifier of an amplifier pair coupled to an output of the input amplifier, a second amplifier of the amplifier pair coupled to the output of the input amplifier, a first impedance coupled between an output of the first amplifier of the amplifier pair and an input of the input amplifier, and a second impedance coupled between the output of the first amplifier of the amplifier pair coupled to an output of the second amplifier of the amplifier pair. A substantially capacitive load is coupled to the output of the second amplifier. The substantially capacitive load is a piezo-capacitance, wherein the piezo-capacitance is employed in haptics. The second impedance, a shunt impedance, allows for a feedback of output variations between the first amplifier and the second amplifier over the first impedance.

Abstract: The present disclosure provides a reference one time programmable (OTP) cell, wherein the reference OTP cell can generate a reference bias current in at least a programmed-on configuration;a current mirror coupled to an output of the OTP cell, wherein the current mirror includes at least two gate-coupled field effect transistors (FETs); wherein a current gain of a second of the two FETS is a fraction less than one of a first of the at least two gate-coupled FETs; a programmable OTP memory bit element (OTPMBE) coupled to an input of the current mirror; and a comparator having an input coupled to a node between the OTPMBE and the current mirror.

Abstract: A high-voltage driver amplifier for piezo haptics comprises an input amplifier having a gain greater than one, a first amplifier of an amplifier pair coupled to an output of the input amplifier, a second amplifier of the amplifier pair coupled to the output of the input amplifier, a first impedance coupled between an output of the first amplifier of the amplifier pair and an input of the input amplifier, and a second impedance coupled between the output of the first amplifier of the amplifier pair coupled to an output of the second amplifier of the amplifier pair. A substantially capacitive load is coupled to the output of the second amplifier. The substantially capacitive load is a piezo-capacitance, wherein the piezo-capacitance is employed in haptics. The second impedance, a shunt impedance, allows for a feedback of output variations between the first amplifier and the second amplifier over the first impedance.

Abstract: A high-side boosted gate drive circuit is disclosed. In a particular example, an output driver is described, comprising a switching device configured to selectively conduct current in response to a charge being present at a control terminal for a duty cycle, a charging device configured to deliver charge to the control terminal based on the first duty cycle, a charge control device configured to selectively couple the charging device to deliver charge to the control terminal and to selectively decouple the charging device from the control terminal to charge the charging device, and a discharge control device configured to remove charge from the control terminal.

Abstract: A power converter receiving a single-sided supply which is ground-terminated and providing a regulated positive supply and a regulated negative supply that is optimized to the expected output range of a class AB amplifier, as well as providing excellent efficiency. The converter finds application as a compact converter to power an audio amplifier driving an audio device which is ground terminated, such as a speaker.

Abstract: An apparatus for reducing current leakage between an input locus and at least one power rail for a system includes, for each respective power rail: (a) A first diode unit coupled between the input locus and a coupling locus. The first diode unit is configured to effect substantially zero potential drop during normal operation of the apparatus. (b) A second diode unit coupled between the coupling locus and the respective power rail. The second diode unit is configured to present no forward bias during normal operation of the apparatus. The first and second diode units cooperate to effect current flow between the input locus and the respective power rail during a predetermined operational condition of the apparatus.

Abstract: A high-side boosted gate drive circuit is disclosed. In a particular example, an output driver is described, comprising a switching device configured to selectively conduct current in response to a charge being present at a control terminal for a duty cycle, a charging device configured to deliver charge to the control terminal based on the first duty cycle, a charge control device configured to selectively couple the charging device to deliver charge to the control terminal and to selectively decouple the charging device from the control terminal to charge the charging device, and a discharge control device configured to remove charge from the control terminal.

Abstract: A method evaluating threshold of a data cell in a memory device including a programming locus coupled with the data cell for receiving a programming signal setting a stored signal level in the data cell and responding to a read signal to indicate the stored signal at a read locus; includes the steps of: (a) in no particular order; (1) selecting a test threshold signal; and (2) setting a read signal at a non-read level; (b) applying the test threshold signal to the programming locus; (c) cycling the read signal between a read level and a non-read level while applying the test threshold signal to the programming locus to present at least two test signals at the read locus when the read signal is at the read level; and (d) while cycling, observing whether the at least two test signals manifest a difference greater than a predetermined amount.

Abstract: A system and method is provided for driving a power field-effect transistor (FET). In one embodiment, a system comprises a control circuit that generates a control signal to provide a gate voltage of the power FET. The system further comprises a slope control circuit coupled between the control circuit and the power FET that is operative to dynamically control the rate-of-change of a gate voltage of the power FET to reduce electromagnetic interference (EMI) emissions and power loss resulting from switching the power FET.

Abstract: An apparatus for regulating a switching device that couples an output locus with one of a first voltage locus and a second voltage locus in response to a driver unit includes: a voltage feedback unit coupling the driver unit with at least one of the first voltage locus and the second voltage locus. The feedback unit provides a voltage feedback signal to the driver unit. The driver unit responds to the voltage feedback signal to affect the coupling by the switching device.

Abstract: Systems and methods are disclosed to enable determining thermal protection characteristics of an integrated circuit. In one embodiment, an integrated circuit includes a proportional to absolute temperature (PTAT) generator that provides a PTAT signal that varies as a function of temperature. Thermal protection control system provides an output signal indicative of a thermal protection condition based at least in part on the PTAT signal. A monitoring system that provides a path to enable selective measuring of at least one signal associated with operation of the thermal protection control system.

Abstract: A power converter receiving a single-sided supply which is ground-terminated and providing a regulated positive supply and a regulated negative supply that is optimized to the expected output range of a class AB amplifier, as well as providing excellent efficiency. The converter finds application as a compact converter to power an audio amplifier driving an audio device which is ground terminated, such as a speaker.

Abstract: A method evaluating threshold of a data cell in a memory device including a programming locus coupled with the data cell for receiving a programming signal setting a stored signal level in the data cell and responding to a read signal to indicate the stored signal at a read locus; includes the steps of: (a) in no particular order: (1) selecting a test threshold signal; and (2) setting a read signal at a non-read level; (b) applying the test threshold signal to the programming locus; (c) cycling the read signal between a read level and a non-read level while applying the test threshold signal to the programming locus to present at least two test signals at the read locus when the read signal is at the read level; and (d) while cycling, observing whether the at least two test signals manifest a difference greater than a predetermined amount.