Abstract: An optical assembly incorporating a wedge-shaped optically transparent prism, a 45 degree right isosceles triangular prism which has two thin film coated surfaces, a rhomboidal prism attached to the triangular prism, a second, smaller 45 degree right isosceles triangular prism attached to one end face of the rhomboidal prism and two planoconvex lenses attached to the combination of the rhomboidal and second triangular prisms is mounted within a housing. All of the optical components are cemented to the adjacent component utilizing a transparent optical cement to form an integral unit.

Abstract: A two-stage beam positioning apparatus for use in an optical data storage device is provided. A fixed assembly includes a light beam source and detector, light beam focusing and track following apparatus. The fixed assembly is optically coupled to a movable assembly which provides coarse positioning of a focused light spot on a data storage medium such as an optical recording disc. The coarse positioning assembly is mechanically independent from the light beam source and detector assembly and, therefore, may be made very stiff and light resulting in a high bandwidth and reduced data access time. Since the light beam source and detector assembly and the focusing and track following control apparatus are mechanically isolated from the movable coarse positioning assembly, the size and mass of these components are not critical and do not affect data access time.

Abstract: A digital filter, having a raised-cosine function in the frequency domain, is implemented in the time domain. For positive and negative impulse inputs, the time domain response of the corresponding frequency domain raised cosine response is created by way of a programmable read-only memory (PROM), the contents of which are selectively addressed by the combination of the contents of a shift register and a counter. The shift register contains a prescribed number of digital samples of successive data bits to be transmitted, while the counter is employed to identify or scan a plurality of successive finite filter response values, based upon the current contents of the shift register. From the memory locations of the PROM corresponding to successively generated address, values are read out representative of the overall or accumulated filter response attributable to the data bits stored in the shift register at the successive sample points determined by the contents of the counter.

Abstract: An apparatus for scrambling a television signal in which horizontal lines of the transmitted television picture are selectively inverted in accordance with the state of a pseudorandom noise generator. In order to permit correction of the throughput gain as well as the throughput offset at the receiving end of the communication link so as to obtain a desired level of picture quality, particularly in a satellite communication system, an analog calibration signal representing both black and white levels is inserted into a horizontal line of the vertical retrace interval at the transmission end of the link. This calibration signal is then detected at the receiving end of the link and the signal levels are adjusted as needed. In addition, a randomly-varying key code signal for resetting the pseudorandom noise generator is randomly inserted into another horizontal line of the vertical retrace period to control scrambling.

Abstract: An automatic alignment system for use in a digital modem, having a performance indicator circuit associated therewith, adjusts the control voltages applied to selected alignment points therein in order to minimize the error indication output of the performance indicator circuit. The alignment system interfaces with a microprocessor and provides the necessary timing mechanism to generate write pulses which control the operation of respective processing circuits associated with the various alignment points in the modem analog unit. Each of the processing circuits in the modem analog unit includes a digital-to-analog converter, a data latch, and an amplifier which processes the output of the microprocessor interface to generate an analog control voltage.