Abstract: A system and method provide efficient, secure, and highly reliable authentication for transaction processing and/or access control applications. A personal digital key (PDK) is programmed using a trusted programming device to initialize and/or register the PDK for use. In one embodiment, the initialization and registration processes are administered by a specialized trusted Notary to ensure the processes follow defined security procedures. In a biometric initialization, the programming device acquires a biometric input from a user and writes the biometric data to a tamperproof memory in the PDK. In registration, the Programmer communicates to one or more remote registries to create or update entries associated with the user PDK. Once initialized and registered, the PDK can be used for various levels of secure authentication processes.

Abstract: An image sensor utilizes a pure boron layer and a second epitaxial layer having a p-type dopant concentration gradient to enhance sensing DUV, VUV or EUV radiation. Sensing (circuit) elements and associated metal interconnects are fabricated on an upper surface of a first epitaxial layer, then the second epitaxial layer is formed on a lower surface of the first epitaxial layer, and then a pure boron layer is formed on the second epitaxial layer. The p-type dopant concentration gradient is generated by systematically increasing a concentration of p-type dopant in the gas used during deposition/growth of the second epitaxial layer such that a lowest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with the first epitaxial layer, and such that a highest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with pure boron layer.

Abstract: Methods and apparatus are provided for attaching a first device to a second device. The method includes providing an attachment structure for attaching the first device to the second device that includes a fastener that is movable from a first position to a second position within the attachment structure, moving the first device into position to be attached to the second device with the fastener in the first position, obscuring an attachment detection window with a window barrier fixed to the fastener, securing the first device to the second device by sliding the fastener from the first position to the second position, locking the fastener in the second position, revealing the attachment detection window when the fastener is locked in the second position, and reading the attachment detection window to detect that the first device has been properly attached to the second device.

Abstract: A method of treating or preventing a neuroinflammatory and/or neurodegenerative disease in a subject by administering a pharmaceutically effective amount of a CB2 receptor agonist is described. The CB2 receptor agonist can be a compound according to formula I or a pharmaceutically acceptable salt thereof, with R1 and R2 as defined herein. Administration of the CB2 receptor agonist activates CB2 receptors in the microglia, can restore syntaptic plasticity, cognition, and memory in subjects having elevated levels of amyloid-?peptide in the brain.

Abstract: An image sensor for electrons or short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. The circuit elements are connected by metal interconnects comprising a refractory metal. An anti-reflection or protective layer may be formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.

Abstract: A time delay and integration charge coupled device includes an array of pixels and a clock generator. The array of pixels is distributed in a scan direction and a line direction perpendicular to the scan direction in which at least some of the pixels of the array include three or more gates aligned in the scan direction. The clock generator provides clocking signals to transfer charge along the scan direction between two or more pixel groups including two or more pixels adjacent in the scan direction. The clocking signals include phase signals to transfer the charge to an adjacent pixel group along the scan direction at a rate corresponding to the velocity of the target by driving the gates of the two or more pixel groups and generating a common potential well per pixel group for containing charge generated in response to incident illumination.

Abstract: A scanning electron microscope incorporates a multi-pixel solid-state electron detector. The multi-pixel solid-state detector may detect back-scattered and/or secondary electrons. The multi-pixel solid-state detector may incorporate analog-to-digital converters and other circuits. The multi-pixel solid state detector may be capable of approximately determining the energy of incident electrons and/or may contain circuits for processing or analyzing the electron signals. The multi-pixel solid state detector is suitable for high-speed operation such as at a speed of about 100 MHz or higher. The scanning electron microscope may be used for reviewing, inspecting or measuring a sample such as unpatterned semiconductor wafer, a patterned semiconductor wafer, a reticle or a photomask. A method of reviewing or inspecting a sample is also described.

Abstract: An inspection system and methods in which analog image data values (charges) captured by an image sensor are binned (combined) before or while being transmitted as output signals on the image sensor's output sensing nodes (floating diffusions), and in which an ADC is controlled to sequentially generate multiple corresponding digital image data values between each reset of the output sensing nodes. According to an output binning method, the image sensor is driven to sequentially transfer multiple charges onto the output sensing nodes between each reset, and the ADC is controlled to convert the incrementally increasing output signal after each charge is transferred onto the output sensing node. According to a multi-sampling method, multiple charges are vertically or horizontally binned (summed/combined) before being transferred onto the output sensing node, and the ADC samples each corresponding output signal multiple times. The output binning and multi-sampling methods may be combined.

Abstract: A system and method for wireless synchronization on a network are disclosed. In one embodiment, the wireless device includes a wireless transceiver and processing circuitry. The wireless transceiver wirelessly receives synchronization information including a superframe from a first wireless, reader device, and wirelessly transmits the synchronization information to a second wireless, reader device and a portable wireless device, and to wirelessly detect a presence of a portable wireless device. The processing circuitry communicates synchronization information to the second wireless, reader device and portable wireless device. The superframe is used to synchronize a wireless data exchange between the third wireless, reader device and the portable wireless device.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer and a doped layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: A multiple-column-per-channel image CCD sensor utilizes a multiple-column-per-channel readout circuit including connected transfer gates that alternately transfer pixel data (charges) from a group of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at multiple times the line clock rate to pass the image charges to the shared output circuit. A symmetrical fork-shaped diffusion is utilized in one embodiment to merge the image charges from the group of related pixel columns. A method of driving the multiple-column-per-channel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the multiple-column-per-channel CCD sensor is also described.

Abstract: An imaging sensor assembly includes at least one substrate including a plurality of substrate signal lines. The imaging sensor assembly also includes at least one imaging sensor package disposed on the at least one substrate, the at least one imaging sensor package including at least one imaging sensor disposed on at least one imaging sensor package substrate. The imaging sensor assembly also includes at least one receiver package disposed on the at least one substrate, the receiver package including at least one receiver integrated circuit disposed on at least one receiver package substrate. The imaging sensor assembly also includes at least one electrical interconnect operably coupled to the at least one imaging sensor package and the at least one receiver package. A plurality of data signals are transmitted between the at least one imaging sensor package and the at least one receiver package via the at least one electrical interconnect.

Abstract: A system and method for wireless synchronization on a network are disclosed. In one embodiment, the wireless device includes a wireless transceiver and processing circuitry. The wireless transceiver wirelessly receives synchronization information including a superframe from a first wireless, reader device, and wirelessly transmits the synchronization information to a second wireless, reader device and a portable wireless device, and to wirelessly detect a presence of a portable wireless device. The processing circuitry communicates synchronization information to the second wireless, reader device and portable wireless device. The superframe is used to synchronize a wireless data exchange between the third wireless, reader device and the portable wireless device.

Abstract: A system and method provides efficient and highly reliable customer and asset tracking. A Personal Digital Key (PDK) is associated with and carried by a user or fixed to an asset. The PDK wirelessly communicates with a receiver/decoder circuit (RDC) that can be coupled to a variety of electronic devices. The RDC authenticates the PDK based on received data and stores information to track customers and provide improved service. The RDC can be coupled to or integrated with a variety of electronic devices. The operation of the electronic device is determined based on an identification code of the detected PDK and an identification code of the RDC. The electronic device, the PDK or both can be configured with a personalized user interface and execute specific functions based on stored state information associated with the PDK and RDC identification codes.

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

Abstract: Wireless client devices within a wireless network exchange data with other wireless devices during particular time slots determined by the network. More particularly, the system generates and wirelessly broadcasts synchronization information to the client devices, where the synchronization information contains individual masks to be applied to bit fields of individual client devices, where said time slots are determined in accordance with the masked bit fields. In such a manner, client devices can be coordinated to communicate with the system in a dynamic real-time tiered manner.

Abstract: A system and method provide efficient, secure, and highly reliable authentication for transaction processing and/or access control applications. A personal digital key (PDK) is programmed using a trusted programming device to initialize and/or register the PDK for use. In one embodiment, the initialization and registration processes are administered by a specialized trusted Notary to ensure the processes follow defined security procedures. In a biometric initialization, the programming device acquires a biometric input from a user and writes the biometric data to a tamperproof memory in the PDK. In registration, the Programmer communicates to one or more remote registries to create or update entries associated with the user PDK. Once initialized and registered, the PDK can be used for various levels of secure authentication processes.

Abstract: A system and method for wireless synchronization on a network are disclosed. In one embodiment, the wireless device includes a wireless transceiver and processing circuitry. The wireless transceiver wirelessly receives synchronization information including a superframe from a first wireless, reader device, and wirelessly transmits the synchronization information to a second wireless, reader device and a portable wireless device, and to wirelessly detect a presence of a portable wireless device. The processing circuitry communicates synchronization information to the second wireless, reader device and portable wireless device. The superframe is used to synchronize a wireless data exchange between the third wireless, reader device and the portable wireless device.

Abstract: A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer and a doped layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.