Patents by Inventor David Levi

David Levi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240179029
    Abstract: Approaches in accordance with various embodiments enable communication functionality to be added to an existing hardware component, such as a network interface controller (NIC), data processing unit (DPA), or network switch, rather than requiring an additional component such as a Front Haul Multiplexor (FHM)-type for cellular communications. Such an approach not only avoids the cost and complexity of managing additional hardware components, but can also reduce bandwidth needed for signal transmission. For downlink communications, data can be copied to the relevant radio units of a cell in a single cell deployment architecture to be transmitted to a target client device, such as a cellular handset. For uplink communications, data received from a client device to multiple radio units can undergo decompression and channel estimation before combining the data into a single signal or data stream.
    Type: Application
    Filed: November 29, 2022
    Publication date: May 30, 2024
    Inventors: Joseph Boccuzzi, Dotan David Levi
  • Publication number: 20240168797
    Abstract: In one embodiment, a system includes a peripheral data connection bus configured to connect to devices and transfer data between the devices, a scheduling machine configured to connect to the peripheral data connection bus and send a read request message to a first processing device, and the first processing device configured to be connected to the peripheral data connection bus, and responsively to the read request message add a time value to a read response message, and provide the read response message to the scheduling machine, and wherein the scheduling machine is configured to read the time value from the provided read response message and schedule processing of an operation by a second processing device responsively to the read time value.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Inventors: Wojciech Wasko, Dotan David Levi, Harsha Deepak Banuli Nanje Gowda, Natan Manevich, Daniel Marcovitch
  • Publication number: 20240154712
    Abstract: A system for maintaining a Precision Time Protocol (PTP) hardware clock, the system being operative in conjunction with a network device which is external to the system, the system comprising a controller to receive information characterizing a network peer oscillator frequency, wherein the information was extracted from an RX symbol rate, and to adjust the PTP Hardware Clock's frequency responsive to the information characterizing the network peer oscillator frequency.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 9, 2024
    Inventors: Bar Shapira, Ariel Almog, Dotan David Levi, Natan Manevich, Thomas Kernen, Liron Mula
  • Publication number: 20240154783
    Abstract: In one embodiment, a system includes a network interface controller to receive a first clock-synchronization message from a clock-synchronization leader device and send a second clock-synchronization messages to at least one clock-synchronization follower device, and a processor to execute software to generate the second clock-synchronization message, and generate a control dependency to condition sending the second clock-synchronization message by the network interface controller to the at least one clock-synchronization follower device on the network interface controller receiving the first clock-synchronization message from the clock-synchronization leader device.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Dotan David Levi, Wojciech Wasko
  • Patent number: 11979340
    Abstract: A method for communication includes mapping transport sequence numbers in headers of data packets received from a network to respective buffers in a memory of a host computer. At least a part of the data from payloads of the received data packets is written directly to the respective buffers.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: May 7, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Boris Pismenny, Dotan David Levi, Gal Yefet
  • Patent number: 11974523
    Abstract: Methods, apparatus, and system to manage an atmosphere and/or an antimicrobial inside a vacuum chamber or container, including via at least one of valves, sensors, manifold, antimicrobial delivery unit, antimicrobial sachet, vacuum pump, and an atmosphere control.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: May 7, 2024
    Assignee: RIPELOCKER LLC
    Inventors: George Frank Lobisser, G. Kyle Lobisser, Andrew B. Harrah, Eric Levi, David Shock
  • Publication number: 20240146431
    Abstract: In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Inventors: Wojciech Wasko, Dotan David Levi, Avi Urman, Natan Manevich
  • Publication number: 20240134731
    Abstract: A device includes a hardware block to perform a hardware process and internal logic coupled between a processing device, which executes instructions, and the hardware block. The internal logic can one of measure execution time or count clock cycles of at least a portion of the hardware process. The internal logic can further, in response to the measured execution time or the counted clock cycles satisfying a predetermined condition, provide data associated with the one of the execution time measurement or the clock cycles count to the processing device, the data being statistically indicative of a latency of data packets sent by the hardware process over a total time the hardware process executes.
    Type: Application
    Filed: December 5, 2022
    Publication date: April 25, 2024
    Inventors: Natan Manevich, Dotan David Levi, Shay Aisman, Ariel Almog, Ran Avraham Koren
  • Patent number: 11961925
    Abstract: The present disclosure relates to a passivating contact that includes a dielectric layer constructed of a first material, an intervening layer constructed of a second material, and a substrate constructed of a semiconductor, where the dielectric layer is positioned between the substrate and the intervening layer, the dielectric layer has a first thickness, and the substrate has a second thickness. The passivating contact also includes a plurality of conductive pathways that include the second material and pass through the first thickness, the second material penetrates into the second thickness forming a plurality of penetrating regions within the substrate, and the plurality of conductive pathways are configured to allow current to pass through the first thickness.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: April 16, 2024
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Pauls Stradins, William Michael Nemeth, David Levi Young, Caroline Lima Salles de Souza
  • Patent number: 11940933
    Abstract: A computing system includes at least one peripheral bus, a peripheral device connected to the at least one peripheral bus, at least one memory, and first and second system components. The first system component is (i) associated with a first address space in the at least one memory and (ii) connected to the peripheral device via the at least one peripheral bus. The second system component is (i) associated with a second address space in the at least one memory and (ii) connected to the peripheral device via the at least one peripheral bus. The first system component is arranged to cause the peripheral device to access the second address space that is associated with the second system component.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: March 26, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Idan Burstein, Dotan David Levi, Ariel Shahar, Lior Narkis, Igor Voks, Noam Bloch, Shay Aisman
  • Publication number: 20240097876
    Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Dotan David Levi, Ariel Shahar, Shahaf Shuler, Ariel Almog, Eitan Hirshberg, Natan Manevich
  • Patent number: 11934332
    Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.
    Type: Grant
    Filed: February 1, 2022
    Date of Patent: March 19, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Daniel Marcovitch, Dotan David Levi, Eyal Srebro, Eliel Peretz, Roee Moyal, Richard Graham, Gil Bloch, Sean Pieper
  • Publication number: 20240089077
    Abstract: A network interface device includes a local register and packet processing circuitry coupled to the local register. The packet processing circuitry is to: capture a network packet transmitted by a software application running on an integrated computing system; capture, at time of transmission of the network packet, a value of a physical clock as a receive timestamp for subscriber entities that are running on the integrated computing system; store the receive timestamp in the local register; associate the receive timestamp from the local register with a first packet copy of the network packet; insert the first packet copy to a first receive pipeline of a first subscriber entity; associate the receive timestamp from the local register with a second packet copy of the network packet; and insert the second packet copy to a second receive pipeline of a second subscriber entity.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 14, 2024
    Inventors: Wojciech Wasko, Dotan David Levi, Natan Manevich, Maciek Machnikowski
  • Patent number: 11917045
    Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.
    Type: Grant
    Filed: July 24, 2022
    Date of Patent: February 27, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Dotan David Levi, Arnon Sattinger, Natan Manevich, Wojciech Wasko, Ariel Almog, Bar Or Shapira
  • Patent number: 11911123
    Abstract: A body mountable robot may include a set of stages disposed in a parallel configuration. The body mountable robot may include a set of actuating joints, wherein an actuating joint, of the set of actuating joints, is configured to rotate with respect to a corresponding stage of the set of stages. The body mountable robot may include at least one actuator, wherein the at least one actuator is configured to actuate at least one actuating joint of the set of actuating joints. The body mountable robot may include a set of scissor mechanisms, wherein a scissor mechanism, of the set of scissor mechanisms, that is coupled to the actuating joint, is supported by the corresponding stage, and wherein the scissor mechanism is configured to translate with respect to the corresponding stage.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: February 27, 2024
    Assignee: The Johns Hopkins University
    Inventors: Iulian I. Iordachita, Jin Seob Kim, David Levi, Kevin Cleary, Reza Monfaredi
  • Publication number: 20240064443
    Abstract: Systems, devices, and methods are described herein for reducing a link bringup time period for optical switching between network devices. An example method of the present disclosure receives an indication of a reconfiguration condition associated with an optical switch communicatively coupled to an optical communication channel and based on the reconfiguration condition, selects first data associated with a storage device or second data associated with a pattern generator device for transmission to a first network device. Selecting the first or second data may be based on a digital logic signal that indicates whether data is actively received from the second network device via the optical communication channel or may be based on a defined schedule for reconfiguring the optical switch.
    Type: Application
    Filed: September 20, 2022
    Publication date: February 22, 2024
    Inventors: Ioannis (Giannis) Patronas, Paraskevas Bakopoulos, Dotan David Levi, Aviv Berg, Wojciech Wasko, Dimitrios Syrivelis, Elad Mentovich, Yoav Rozenberg, Nikolaos Argyris
  • Patent number: 11907754
    Abstract: In one embodiment, a system includes a memory, a processing device including a device processor; and a device clock, and a peripheral device including an interface to share data with the processing device, a hardware clock, and processing circuitry to write respective interrupt signaling messages to the memory responsively to respective hardware clock values of the hardware clock, and wherein the device processor is configured, responsively to the respective interrupt signaling messages being written to the memory, to perform a time-dependent action.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: February 20, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Wojciech Wasko, Dotan David Levi, Liron Mula, Natan Manevich
  • Publication number: 20240056400
    Abstract: Systems, methods, and devices that perform computing operations are provided. In one example, a system includes a least one node, the at least one node having one or more processors, each having associated memory, a clock, a scheduler, the scheduler monitoring one or more of rates, rates of lanes, rates at which packets are sent, times, latencies of packets, topology, communication states, nodes, and packets in the system, an attribute monitor that measures counters for one or more of congestion state, line rate, and communication attributes. A packet scheduler determines a destination node based on information from the scheduler and the attribute monitor, and sends at least a portion of a packet to the destination node.
    Type: Application
    Filed: August 12, 2022
    Publication date: February 15, 2024
    Inventors: Zsolt Alon Wertheimer, Omer Shabtai, Barak Goldberg, Lion Levi, Gil Mey-Tal, Bar Or Shapira, Dotan David Levi
  • Publication number: 20240037352
    Abstract: A method for security tag removal includes providing a terminal comprising a receptacle, which is configured to receive a magnetic security tag that is attached to an item of merchandise. A wireless transceiver in the terminal reads identification data that is encoded in the security tag while the security tag is in the receptacle. A query is transmitted from the terminal to a server with respect to the identification data. In response to the query, an authorization is received from the server with respect to the item of merchandise to which the security tag is attached. In response to the authorization, a magnet in the terminal is actuated so as to release the security tag from the item of merchandise.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 1, 2024
    Inventors: Ori David Levi, Barak Amtanani
  • Publication number: 20240031121
    Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.
    Type: Application
    Filed: July 24, 2022
    Publication date: January 25, 2024
    Inventors: Dotan David Levi, Arnon Sattinger, Natan Manevich, Wojciech Wasko, Ariel Almog, Bar Or Shapira