Patents by Inventor David M. Osika

David M. Osika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5254941
    Abstract: A wafer substrate test structure and method provides a novel means for quantitatively determining electrical isolation between active devices and passive elements in a monolithic integrated circuit. The structure and method of this invention are useful for both optimal design and manufacture of integrated circuit devices.
    Type: Grant
    Filed: October 29, 1991
    Date of Patent: October 19, 1993
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: David M. Osika
  • Patent number: 5166639
    Abstract: Linear high gain (greater than 20 dB) and high power (greater than +20 dbm) devices for RF power amplifiers are achieved using either fully monolithic or hybridized versions of silicon MMIC two-stage cascaded amplifiers. The device features three feedback loops in conjunction with a DC biasing network. Resistor-capacitor feedback circuits utilize only two capacitive elements which are provided as a single three-terminal element having a common lower plate.
    Type: Grant
    Filed: October 29, 1991
    Date of Patent: November 24, 1992
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventors: Ronald P. Green, David M. Osika