Patents by Inventor David M. Schlueter
David M. Schlueter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8028178Abstract: A universal serial bus power control circuit including at least one first switch which selectively couples a power source node to an external power node, a comparator which detects when the external power node is charged, a feedback node for enabling voltage regulation, a charge circuit and a controller. The charge circuit charges the external power node from the power source node and selectively couples the feedback node to at least one of the power source node and the external power node. The controller opens the first switch when the external power node is not charged, controls the charge circuit to charge the external power node while coupling the feedback node to the power source node, and closes the first switch and couples the feedback node to the external power node in a host mode when the external power node is charged.Type: GrantFiled: September 9, 2008Date of Patent: September 27, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Siddhartha GK, David M. Schlueter, Richard T. Unetich
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Patent number: 7999601Abstract: A switch controller has a charge pump, a selector switch connected to the charge pump, and a pre-charge power supply input connectable to the input of the selector switch. For each of the output channels being controlled, a power control switch is connected to an output of the selector switch. In response to commands, output channels are enabled and disabled, causing corresponding actions in the power control switches. When an output channel is to be activated, the output channel is selected by the selector switch and the pre-charge power supply connected to the input of the selector switch. The charging is completed by the charge pump and the enabled status of the power control switch is maintained by the charge pump.Type: GrantFiled: April 1, 2005Date of Patent: August 16, 2011Assignee: Freescale Semiconductor, Inc.Inventors: David M. Schlueter, Cor H. Voorwinden
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Publication number: 20100308890Abstract: A switch controller has a charge pump, a selector switch connected to the charge pump, and a pre-charge power supply input connectable to the input of the selector switch. For each of the output channels being controlled, a power control switch is connected to an output of the selector switch. In response to commands, output channels are enabled and disabled, causing corresponding actions in the power control switches. When an output channel is to be activated, the output channel is selected by the selector switch and the pre-charge power supply connected to the input of the selector switch. The charging is completed by the charge pump and the enabled status of the power control switch is maintained by the charge pump.Type: ApplicationFiled: April 1, 2005Publication date: December 9, 2010Applicant: Freescale Semiconductor, Inc.Inventors: David M. Schlueter, Cor H. Voorwinden
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Publication number: 20100064153Abstract: A universal serial bus power control circuit including at least one first switch which selectively couples a power source node to an external power node, a comparator which detects when the external power node is charged, a feedback node for enabling voltage regulation, a charge circuit and a controller. The charge circuit charges the external power node from the power source node and selectively couples the feedback node to at least one of the power source node and the external power node. The controller opens the first switch when the external power node is not charged, controls the charge circuit to charge the external power node while coupling the feedback node to the power source node, and closes the first switch and couples the feedback node to the external power node in a host mode when the external power node is charged.Type: ApplicationFiled: September 9, 2008Publication date: March 11, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Siddhartha GK, David M. Schlueter, Richard T. Unetich
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Patent number: 7667545Abstract: A lock loop circuit (216) includes a precharge circuit (304), an oscillator circuit (306), and a calibration circuit (309). The calibration circuit includes at least one register (362). The precharge circuit provides a precharge signal (347). The oscillator circuit provides an output frequency signal (228) in response to a steering signal (334) that is based on the precharge signal. The calibration circuit, prior to the lock loop circuit entering a disabled mode of operation, determines a calibration value (368) for the precharge circuit based on the precharge signal and the steering signal. The calibration circuit stores the calibration value as a digital calibration value (370) in the register.Type: GrantFiled: March 4, 2008Date of Patent: February 23, 2010Assignee: Freescale Semiconductor, Inc.Inventors: David M. Schlueter, Michael C. Doll
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Patent number: 7595699Abstract: A lock loop circuit (230) includes a floating ground loop filter circuit (302) and a precharge circuit (304). The floating ground loop filter circuit includes at least one capacitive element (326, 328). The floating ground loop filter circuit provides a steering signal (334) for a controllable oscillator circuit (306) in response to a precharge signal (347). The precharge circuit provides the precharge signal in response to lock loop enable information (226). The precharge circuit controls the floating ground loop filter to bypass the at least one capacitive element for a period of time (606) in response to the lock loop enable information.Type: GrantFiled: March 4, 2008Date of Patent: September 29, 2009Assignee: Freescale Semiconductor, Inc.Inventors: David M. Schlueter, Michael C. Doll
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Publication number: 20090224838Abstract: A lock loop circuit (216) includes a precharge circuit (304), an oscillator circuit (306), and a calibration circuit (309). The calibration circuit includes at least one register (362). The precharge circuit provides a precharge signal (347). The oscillator circuit provides an output frequency signal (228) in response to a steering signal (334) that is based on the precharge signal. The calibration circuit, prior to the lock loop circuit entering a disabled mode of operation, determines a calibration value (368) for the precharge circuit based on the precharge signal and the steering signal. The calibration circuit stores the calibration value as a digital calibration value (370) in the register.Type: ApplicationFiled: March 4, 2008Publication date: September 10, 2009Applicant: Freescale Semiconductor, Inc.Inventors: David M. Schlueter, Michael C. Doll
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Publication number: 20090224839Abstract: A lock loop circuit (230) includes a floating ground loop filter circuit (302) and a precharge circuit (304). The floating ground loop filter circuit includes at least one capacitive element (326, 328). The floating ground loop filter circuit provides a steering signal (334) for a controllable oscillator circuit (306) in response to a precharge signal (347). The precharge circuit provides the precharge signal in response to lock loop enable information (226). The precharge circuit controls the floating ground loop filter to bypass the at least one capacitive element for a period of time (606) in response to the lock loop enable information.Type: ApplicationFiled: March 4, 2008Publication date: September 10, 2009Applicant: Freescale Semiconductor, Inc.Inventors: David M. Schlueter, Michael C. Doll