Patents by Inventor David Menis
David Menis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7191368Abstract: An electronic tester with digital, and analog, and memory test circuitry on a single platform. A test head is coupled to a device under test. The device under test can be a system-on-a-chip integrated circuit, a mixed signal integrated circuit, a digital integrated circuit, or an analog integrated circuit. Digital test circuitry applies digital test signals to the device under test coupled to the test head and receives digital outputs from the device under test in response to the digital test signals. Analog test circuitry applies analog test signals to the device under test coupled to the test head and receives analog outputs from the device under test in response to the analog test signals. Memory test circuitry applies memory test patterns to the device under test coupled to the test head and receives memory outputs from the device under test in response to the memory test patterns.Type: GrantFiled: August 22, 2001Date of Patent: March 13, 2007Assignee: LTX CorporationInventors: Donald V. Organ, Kenneth J. Lanier, Roger W. Blethen, H. Neil Kelly, Michael G. Davis, Jeffrey H. Perkins, Tommie Berry, Phillip Burlison, Mark Deome, Christopher J. Hannaford, Edward J. Terrenzi, David Menis, David W. Curry, Eric Rosenfeld
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Patent number: 7092837Abstract: An electronic tester with digital, and analog, and memory test circuitry on a single platform. A test head is coupled to a device under test. The device under test can be a system-on-a-chip integrated circuit, a mixed signal integrated circuit, a digital integrated circuit, or an analog integrated circuit. Digital test circuitry applies digital test signals to the device under test coupled to the test head and receives digital outputs from the device under test in response to the digital test signals. Analog test circuitry applies analog test signals to the device under test coupled to the test head and receives analog outputs from the device under test in response to the analog test signals. Memory test circuitry applies memory test patterns to the device under test coupled to the test head and receives memory outputs from the device under test in response to the memory test patterns.Type: GrantFiled: September 15, 2003Date of Patent: August 15, 2006Assignee: LTX CorporationInventors: Kenneth J. Lanier, Roger W. Blethen, H. Neil Kelly, Michael G. Davis, Jeffrey H. Perkins, Tommie Berry, Phillip Burlison, Mark Deome, Christopher J. Hannaford, Edward J. Terrenzi, David Menis, David W. Curry, Eric Rosenfeld
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Patent number: 6675339Abstract: An electronic tester with digital, and analog, and memory test circuitry on a single platform. A test head is coupled to a device under test. The device under test can be a system-on-a-chip integrated circuit, a mixed signal integrated circuit, a digital integrated circuit, or an analog integrated circuit. Digital test circuitry applies digital test signals to the device under test coupled to the test head and receives digital outputs from the device under test in response to the digital test signals. Analog test circuitry applies analog test signals to the device under test coupled to the test head and receives analog outputs from the device under test in response to the analog test signals. Memory test circuitry applies memory test patters to the device under test coupled to the test head and receives memory outputs from the device under test in response to the memory test patterns.Type: GrantFiled: August 22, 2001Date of Patent: January 6, 2004Assignee: LTX CorporationInventors: Kenneth J. Lanier, Roger W. Blethen, H. Neil Kelly, Michael G. Davis, Jeffrey H. Perkins, Tommie Berry, Phillip Burlison, Mark Deome, Christopher J. Hannaford, Edward J. Terrenzi, David Menis, David W. Curry, Eric Rosenfeld
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Patent number: 6449741Abstract: An electronic tester with digital, and analog, and memory test circuitry on a single platform. A test head is coupled to a device under test. The device under test can be a system-on-a-chip integrated circuit, a mixed signal integrated circuit, a digital integrated circuit, or an analog integrated circuit. Digital test circuitry applies digital test signals to the device under test coupled to the test head and receives digital outputs from the device under test in response to the digital test signals. Analog test circuitry applies analog test signals to the device under test coupled to the test head and receives analog outputs from the device under test in response to the analog test signals. Memory test circuitry applies memory test patterns to the device under test coupled to the test head and receives memory outputs from the device under test in response to the memory test patterns.Type: GrantFiled: October 30, 1998Date of Patent: September 10, 2002Assignee: LTX CorporationInventors: Donald V. Organ, Kenneth J. Lanier, Roger W. Blethen, H. Neil Kelly, Michael G. Davis, Jeffrey H. Perkins, Tommie Berry, Phillip Burlison, Mark Deome, Christopher J. Hannaford, Edward J. Terrenzi, David Menis, David W. Curry, Eric Rosenfeld
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Patent number: 5200696Abstract: An apparatus for a test system for testing an electronic circuit. The apparatus includes an interconnect path, a comparator, a programmable apparatus, a first Schottky diode, and a second Schottky diode. The interconnect path has a first end and a second end. The first end of the interconnect path is coupled to the electronic circuit under test. The interconnect path transmits a signal from the electronic circuit under test to the second end of the interconnect path. The comparator is coupled to the second end of the interconnect path for receiving and comparing the signal from the electronic circuit under test with a reference voltage. The comparator has a high input impedance. The comparator provides an output signal to the test system. The programmable apparatus provides a selectable first voltage and a selectable second voltage. A first Schottky diode is provided for reducing ringing of the signal from the electronic circuit under test.Type: GrantFiled: September 6, 1991Date of Patent: April 6, 1993Assignee: LTX CorporationInventors: David Menis, Harold S. Vitale, Phillip D. Burlison, William R. DeHaven
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Patent number: D656816Type: GrantFiled: September 21, 2011Date of Patent: April 3, 2012Assignee: KFC CorporationInventors: Paul Glaser, Susan Miles, David Menis, Sam Chadha, Ryan Davidson, Scott Fisher