Abstract: Systems and methods are provided for image classification using histograms of oriented gradients (HoG) in conjunction with a trainer. The efficiency of the process is greatly increased by first establishing a bitmap which identifies a subset of the pixels in the HoG window as including relevant foreground information, and limiting the HoG calculation and comparison process to only the pixels included in the bitmap.

Abstract: The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

Abstract: The present application discloses a computing device that can provide a low-power, highly capable computing platform for computational imaging. The computing device can include one or more processing units, for example one or more vector processors and one or more hardware accelerators, an intelligent memory fabric, a peripheral device, and a power management module. The computing device can communicate with external devices, such as one or more image sensors, an accelerometer, a gyroscope, or any other suitable sensor devices.

Abstract: For each storage array in a storage system, a single value score indicative of the overall health of the respective storage array is calculated. Storage array health score may be tracked over time and used to identify storage arrays in need of maintenance. The storage array health score may be calculated as a composite of four component scores: physical component health, logical component health, Service Level Objective compliance and Best Practice Configuration Compliance. The physical component and logical component scores may be based on multiple different category health scores, and each category health score may be based on multiple instance health scores. Health scores may be used to identify remedial actions and predict health score increase as a result of remedial actions.

Abstract: The present application provides a method of randomly accessing a compressed structure in memory without the need for retrieving and decompressing the entire compressed structure.

Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.

Abstract: One of the challenges in bringing computational imaging to a mass market is that computational imaging is inherently computationally expensive. The computational challenges associated with computational imaging are apparent with the computation of a histogram of gradient descriptors. Oftentimes, generating a histogram of gradient descriptors involves computing gradients of an image, binning the gradients according to their orientation, and, optionally, normalizing the bins using a non-linear function. Because each of these operations is expensive, the histogram of gradient descriptor computations is generally computationally expensive and is difficult to implement in a power efficient manner for mobile applications. The present application discloses a computing device that can provide a low-power, highly capable computing platform for computing a histogram of gradient descriptors.

Abstract: The present application provides a method of corner detection and an image processing system for detecting corners in an image. The preferred implementation is in software using enabling and reusable hardware features in the underlying vector processor architecture. The advantage of this combined software and programmable processor datapath hardware is that the same hardware used for the FAST algorithm can also be readily applied to a variety of other computational tasks, not limited to image processing.

Abstract: The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

Abstract: The present application discloses a computing device that can provide a low-power, highly capable computing platform for computational imaging. The computing device can include one or more processing units, for example one or more vector processors and one or more hardware accelerators, an intelligent memory fabric, a peripheral device, and a power management module. The computing device can communicate with external devices, such as one or more image sensors, an accelerometer, a gyroscope, or any other suitable sensor devices.

Abstract: The present application provides a method of corner detection and an image processing system for detecting corners in an image. The preferred implementation is in software using enabling and reusable hardware features in the underlying vector processor architecture. The advantage of this combined software and programmable processor datapath hardware is that the same hardware used for the FAST algorithm can also be readily applied to a variety of other computational tasks, not limited to image processing.

Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.

Abstract: Systems and methods are provided for rendering of a dual eye-specific display. The system tracks the user's eye movements and/or positions, in some implementations, based on electroencephalography (EEG) of the user, to correctly label the central (foveal) and peripheral (extra-foveal) areas of the display. Foveal data is fully rendered while extra-foveal data is reduced in resolution and, in some implementations, shared between the two displays.

Abstract: Systems and methods are provided for image classification using histograms of oriented gradients (HoG) in conjunction with a trainer. The efficiency of the process is greatly increased by first establishing a bitmap which identifies a subset of the pixels in the HoG window as including relevant foreground information, and limiting the HoG calculation and comparison process to only the pixels included in the bitmap.

Abstract: The present application discloses a computing device that can provide a low-power, highly capable computing platform for computational imaging. The computing device can include one or more processing units, for example one or more vector processors and one or more hardware accelerators, an intelligent memory fabric, a peripheral device, and a power management module. The computing device can communicate with external devices, such as one or more image sensors, an accelerometer, a gyroscope, or any other suitable sensor devices.

Abstract: Systems and methods are provided for image classification using histograms of oriented gradients (HoG) in conjunction with a trainer. The efficiency of the process is greatly increased by first establishing a bitmap which identifies a subset of the pixels in the HoG window as including relevant foreground information, and limiting the HoG calculation and comparison process to only the pixels included in the bitmap.

Abstract: One of the challenges in bringing computational imaging to a mass market is that computational imaging is inherently computationally expensive. The computational challenges associated with computational imaging are apparent with the computation of a histogram of gradient descriptors. Oftentimes, generating a histogram of gradient descriptors involves computing gradients of an image, binning the gradients according to their orientation, and, optionally, normalizing the bins using a non-linear function. Because each of these operations is expensive, the histogram of gradient descriptor computations is generally computationally expensive and is difficult to implement in a power efficient manner for mobile applications. The present application discloses a computing device that can provide a low-power, highly capable computing platform for computing a histogram of gradient descriptors.

Abstract: The present application relates to an apparatus for programmable video size reduction with dynamic image filtering for use in block-based video decoding system. The invention improves the image quality within low video memory requirements and allows for efficient decoding of higher resolution video to be displayed on a lower resolution display device.

Abstract: One of the challenges in bringing computational imaging to a mass market is that computational imaging is inherently computationally expensive. The computational challenges associated with computational imaging are apparent with the computation of a histogram of gradient descriptors. Oftentimes, generating a histogram of gradient descriptors involves computing gradients of an image, binning the gradients according to their orientation, and, optionally, normalizing the bins using a non-linear function. Because each of these operations is expensive, the histogram of gradient descriptor computations is generally computationally expensive and is difficult to implement in a power efficient manner for mobile applications. The present application discloses a computing device that can provide a low-power, highly capable computing platform for computing a histogram of gradient descriptors.