Abstract: An object based operating system for a multitasking computer system provides objects which represent the architecture or interrelationships of the systems's resources. Access to certain objects is required in order to use corresponding resources in the system. All objects have a consistent data structure, and a consistent method of defining the operations which apply to each type of object. As a result, it is relatively easy to add new types of system objects to the operating system. The object based operating system supports multiple levels of visibility, allowing objects to be operated on only by processes with the object's range of visibility. This allows objects to be made private to a process, shared by all processes within a job, or visible to all processes within the system. An object or an entire set of objects can be moved to a higher visibility level when objects need to be shared.

Abstract: In a data processing system employing virtual memory techniques and capable of performing a plurality of overlapping scalar and vector data processing operations, apparatus and method are provided to allow continuation of program execution after one or more vector load/store instructions, which refer to data values that are not currently in memory, receive page faults. At the occurrence of such a page fault, all instructions currently in execution are allowed to be completed, whereupon information summarizing the page fault condition is recorded in memory for use by the operating system software and a vector exception is generated. Operating system software responds to this exception, examines the fault information, causes the missing pages to be read into the main memory unit from the mass storage media, re-executes the exception producing vector instruction(s) and continues with the program execution.

Abstract: An object based operating system for a multitasking computer system provides objects which represent the architecture or interrelationships of the system's resources. Access to certain objects is required in order to use corresponding resources in the system. All objects have a consistent data structure, and a consistent method of defining the operations which apply to each type of object. As a result, it is relatively easy to add new types of system objects to the operating system. The object based operating system supports multiple levels of visibility, allowing objects to be operated on only by processes with the object's range of visibility. This allows objects to be made private to a process, shared by all processes within a job, or visible to all processes within the system. An object or an entire set of objects can be moved to a higher visibility level when objects need to be shared.

Abstract: A radix-16 divider, generally comprising two improved radix-4 dividers cascaded combinatorially, also utilizes improved overlapping quotient bit selection, together with concurrent quotient bit selection and rounding techniques, to produce four bits of quotient per divider cycle with reduced hardware requirements.

Abstract: In a data processing system, an instruction is disclosed that generates a fault when a predetermined register position (e.g, the low or least significant bit position) has a predetermined logic signal (e.g., a logic `0` signal). This instruction provides a mechanism to determine when a Boolean value indicates a presence of a fault condition and provides a mechanism to generate the fault when present. For example, in arrays of memory locations that can be addressed by a program, this instruction can respond to the presence of an array address (or reference) that is outside the prescribed bounds of the array. When an invalid address is identified, a signal is entered in the low (i.e., least significant) bit position of a processor scalar register.

Abstract: A central processing unit for a digital computer. In one embodiment, the central processing unit comprises a plurality of pointer registers that may be used during instruction execution to directly address other registers. In a second embodiment, the central processing unit comprises a size register that is loaded during the decode of an operation code with a size code indicating the data path width for that operation code. During instruction execution, the size code may be used at various times to determine data path width.

Abstract: A central processing unit for a digital computer. In one embodiment, the central processing unit comprises a plurality of pointer registers that may be used during instruction execution to directly address other registers. In a second embodiment, the central processing unit comprises a size register that is loaded during the decode of an operation code with a size code indicating the data path width for that operation code. During instruction execution, the size code may be used at various times to determine data path width.

Abstract: A central processing unit for a digital computer has a central memory unit connected to a system bus. A data path unit decodes variable length microinstructions that are stored in the central memory unit and that include an operation code and one or more operand specifiers, issuing a microaddress of one of a set of microinstructions stored in a control store. The microinstructions have a data path control field, a condition/size field and a next address control field. A microinstruction logic control is responsive to the microinstructions, and a memory control unit that includes a data cache memory array operates asynchronously with respect to the data path unit, translating virtual memory addresses to access data from the data cache memory array or from the central memory unit.

Abstract: A communications device transfers process data between a data processing system and an external device at high speed. The communications device receives command signals from a user process program in the data processing system and from the external device. The communications device generates physical addresses in the data processing system with respect to which process data is to be transferred, the physical addresses being generated in response to virtual addresses supplied in the commands. The communications device and the external device also each include apparatus for signalling the other that data is being transferred at too rapid a rate to be processed, or that data is temporarily not being transferred, to prevent data being lost and an error being sent to the data processing system.