Abstract: A multi-cache data storage system has a number of cache units and a main memory. The caches are addressed by a virtual address. When data is updated in one of the caches, the virtual address is translated into a physical address and sent to the main memory over a bus, along with the updated data value. Each cache continuously monitors the bus for updates from other caches and checks whether it holds a data item corresponding to the physical address. If so, the data item is updated or invalidated, so as to ensure cache coherency.

Abstract: An improved video memory system includes a program memory, a display data memory, and a plurality of data fetchers. The data fetchers are used to indirectly address the display data in the display data memory. The data fetchers are programmed during vertical blanking so that selected display data is fetched at selected vertical display positions. During each scan line each data fetcher is "read" by: (1) decrementing a counter in the data fetcher; (2) comparing the counter value against preselected top and bottom values; and (3) using the counter value to indirectly address display data that is to be displayed on the current scan line if the counter value is between the top and bottom values. This relieves the host computer of having to keep track of the current vertical display position, thereby freeing it to use the saved computer cycles to produce more interesting viedo games with more complex display graphics.