Patents by Inventor David Parkhouse

David Parkhouse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230410897
    Abstract: A memory circuit includes first and second inverters that are cross coupled. The first inverter is configured to provide a first drive current from a first supply line to store a first logic state in the memory circuit. The first drive current is larger than a second drive current that the second inverter is configured to provide from the first supply line to store a second logic state in the memory circuit.
    Type: Application
    Filed: August 31, 2023
    Publication date: December 21, 2023
    Applicant: Intel Corporation
    Inventors: David Parkhouse, Andy Lee, J M Lewis Higgins, Yan Cui, Shuxian Chen, Shankar Sinha
  • Publication number: 20220115315
    Abstract: A reticle-stitched integrated circuit is provided. The reticle-stitched integrated circuit extends over a first die area and a second die area of an integrated circuit wafer. While individually the first die area and the second die area are within their respective reticle limits, collectively the first die area and the second die area exceed the reticle limit. A first layer of the reticle-stitched integrated circuit may have communication wires that remain exclusively in only one of the first die area and the second die area. A second layer of the reticle-stitched integrated circuit may have communication wires that overlap the first die area and the second die area, thereby allowing communication between the two die areas and enabling the reticle-stitched integrated circuit to exceed the limit of the reticle.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Atul Maheshwari, Ankireddy Nalamalpu, Mahesh K. Kumashikar, David Parkhouse
  • Publication number: 20220014197
    Abstract: An integrated circuit includes first and second routing crossbars. The second routing crossbar includes first conductors routed in a first direction in a first conductive layer and second conductors routed in a second direction that is perpendicular to the first direction in a second conductive layer. A first subset of the first conductors is coupled to the first routing crossbar. The first subset of the first conductors is coupled to a second subset of the first conductors through a first subset of the second conductors that is coupled to the first and second subsets of the first conductors through first vias. The second subset of the first conductors is coupled to a second subset of the second conductors to through second vias. At least one of the first conductors is decoupled from another one of the first conductors by third vias.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 13, 2022
    Applicant: Intel Corporation
    Inventors: Atul Maheshwari, Wayson Lowe, David Parkhouse, Alexander Andreev, Ban Wong