Abstract: In an example, a method includes receiving an indication of an electrical parameter associated with at least part of a computing device. The method further includes determining whether or not the indication is indicative of an expected electric field distribution associated with a specified hardware configuration for the computing device.

Abstract: In an example, an apparatus is described. The apparatus comprises processing circuitry comprising a control module. The control module is to protect information regarding a machine learning model owned by a third party. The information is protected in a memory communicatively coupled to the control module. In response to receiving an indication that a computing device under control of the control module complies with a third party policy associated with the machine learning model, the control module is to release the information to the computing device.

Abstract: In an example, an apparatus is described. The apparatus comprises processing circuitry comprising a control module. The control module determines whether a computing device communicatively coupled to the control module is in a specified state for executing a machine learning model controlled by a third party entity. In response to determining that the computing device is in the specified state, the control module is to send, to an attestation module in a data processing pipeline associated with the computing device, an indication that the computing device is in the specified state.

Abstract: In an example there is provided a method for receiving notification of an intrusion event in relation to an application from an intrusion detection system, accessing state data in relation to a state of the application prior to the intrusion event, the state data having been stored on the basis of a change of state of the application, accessing a policy to be applied to the state data in response to the intrusion event, modifying the state data on the basis of the policy, and restoring the application on the basis of the modified state data.

Abstract: In an example, an apparatus is described. The apparatus comprises processing circuitry comprising a generating module, a signing module and an interfacing module. The generating module is to generate a statement comprising: a control plane indicator to indicate a control plane state of a computing device used to execute a machine learning model. The statement further comprises information regarding the machine learning model. The signing module is to generate a signature for the statement using an attestation key associated with the apparatus. The interfacing module is to send the statement and the signature to a requesting entity.

Abstract: An example method is disclosed, for example a method of executing a software module in a computing system, the method comprising executing, in a first processing device of the computing system, a first software module to verify a second software module and to cause a second processing device of the computing system to execute the second software module, executing, in the second processing device, the second software module to execute, in the second processing device, a third software module and to provide a first key of a key pair to the third software module, and protecting, by the second processing device, a memory space associated with the third software module, wherein the memory space contains the first key of the key pair, wherein the first processing device contains a second key of the key pair.

Abstract: In an example, a method includes receiving an indication of an electrical parameter associated with at least part of a computing device. The method further includes determining whether or not the indication is indicative of an expected electric field distribution associated with a specified hardware configuration for the computing device.

Abstract: In an example, a method includes providing a computing device with an instruction to cause the computing device to execute the instruction. The method further includes monitoring a side channel of a microarchitectural component of the computing device to obtain an indication of whether or not a state of the microarchitectural component changes as a result of the computing device executing the instruction. The method further includes determining whether or not the indication corresponds to an expected state of the microarchitectural component for the instruction.

Abstract: A method for monitoring control-flow integrity in a low-level execution environment, the method comprising receiving, at a monitor, a message from the execution environment indicating that the execution environment has entered a controlled mode of operation, receiving, at the monitor, a data packet representing execution of a selected portion of a control-flow process at the execution environment, identifying, using the data packet, a pathway corresponding to the selected portion of the control-flow process from a set of permissible control-flow pathways and determining whether the identified pathway corresponds to an expected control-flow behaviour.

Abstract: In an example a method includes retrieving, from a persistent memory, a previously-identified counter value corresponding to an iteration of a prime number generation procedure that previously produced a verified prime number. The method further includes re-generating, using processing circuitry implementing a deterministic prime number calculator and with the previously-identified counter value as an input to the deterministic prime number calculator, the verified prime number.

Abstract: In an example, a method includes obtaining an initial seed, a public parameter associated with a processing apparatus and an indication of a state of the processing apparatus. The method may further include generating, by the processing apparatus, a key corresponding to the state of the processing apparatus. The state of the processing apparatus may be based on a combination of the initial seed, the public parameter and the indication of the state.

Abstract: In an example there is provided an apparatus for a computing system. The apparatus comprises a central processing unit (CPU) and at least one further hardware component. The apparatus comprises a probe communicatively coupled with the hardware component and the CPU, to intercept communication between the hardware component and CPU and an inspection module communicatively coupled to the probe, to access communication data intercepted at the probe relating to communication between the hardware component and CPU determine a state of a process executing on the CPU, on the basis of the communication data and apply a model to the state to infer malicious activity on the CPU.

Abstract: There is described a method including obtaining memory management configuration data, for example, from a memory management unit. The memory management configuration data is used to identify memory locations having a predetermined property. Content is monitored at the identified memory locations.

Abstract: A method is provided, comprising actively testing the access control policy of a software target using a probing logic. The method further comprises determining whether an intrusion in the software target has occurred based on monitored side effects. According to the method, the probing logic is to execute at least one operation that is forbidden by the access control policy. The probing logic is further to create at least one predetermined observable side effect based on the successful execution of the operation.

Abstract: An example system with a pre-OS (Operating System) environment, the pre-OS environment includes a private memory that is isolated from a processor of the system. The pre-OS environment also includes an embedded controller (EC) coupled to the private memory, where the EC includes an embedded key. The EC is to execute instructions to generate an encryption key based on the embedded key; generate a signature key; obtain data; produce an integrity-verification tag based on a hash of the obtained data, where the hash employs the signature key; encrypt the obtained data based on the encryption key; store the encrypted data in the private memory; and store the integrity-verification tag in the private memory in association with the stored encrypted data.

Abstract: An apparatus includes a solid-state a solid-state non-volatile computer memory; and a controller coupled to the memory. The controller to: generate a data set including a tag that indicates that the data set is valid; write the data set into a block of the memory, wherein the block includes multiple addressable locations set to a common first binary value before the write; generate a subsequent data set including a tag that indicates that the subsequent data set is valid; update the tag of the written data set to indicate that the written data set is invalid, wherein the update includes setting an addressable location corresponding to the tag to second binary value different from the first binary value; write the subsequent data set to addressable locations in the block of memory other than the addressable locations of the invalid data set.

Abstract: A method for monitoring access to a user account comprises receiving a user account login status from a target service in response to a user login request, comparing the user account login status with an expected status value at a user apparatus, and on the basis of the comparison, performing at least one of: synchronising the status value at the user apparatus with the user account login status from the target service, and executing a user login update process at the user apparatus.

Abstract: In an example, there is provided a method for attesting to a management state of a device platform configuration, based on a signed data structure that represents a device management status and a time-based value from a secure cryptoprocessor of the device. The signed data structure is sent to a management system for validation based on a comparison to the state of the cryptoprocessor at the time of signing the data structure.

Abstract: An intrusion detection system, comprising a monitor to receive messages from a target over a low-latency communication link comprising a controlled access memory structure logically positioned between the target and the monitor using point-to-point interconnects, the controlled access memory structure to receive a message from the target indicating that the target has entered a controlled mode of operation.

Abstract: In examples, apparatus for detecting malicious or rogue behaviour associated with data packets transmitted between a first device and a second device through a switch is provided, the first device having direct read/write memory access to the second device, in which the apparatus comprises an intercepting device logically intermediate the first device and the switch device to enable the apparatus to analyse the data packets to determine a communication pattern between the first and second devices, compare the communication pattern to a set of expected behaviours for the first device, select, on the basis of the comparison to the set of expected behaviours, a behaviour pattern for the first device, and map the behaviour pattern for the first device to a set of mitigating actions when the behaviour pattern for the first device is symptomatic of a malicious or rogue behaviour.