Patents by Inventor David R. Ng

David R. Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11919839
    Abstract: The present invention relates to inhibitors of histone deacetylases, in particular HDAC8, that are useful for the treatment of cancer and other diseases and disorders, as well as the synthesis and applications of said inhibitors.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 5, 2024
    Assignee: VALO HEALTH, INC.
    Inventors: Kenneth W. Bair, Nicholas Barczak, Bingsong Han, David R. Lancia, Jr., Cuixian Liu, Matthew W. Martin, Pui Yee Ng, Aleksandra Rudnitskaya, Jennifer R. Thomason, Mary-Margaret Zablocki, Xiaozhang Zheng
  • Patent number: 11749576
    Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: September 5, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: John D. Brazzle, Frederick E. Beville, David R. Ng, Michael J. Anderson, Yucheng Ying
  • Publication number: 20210111084
    Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 15, 2021
    Inventors: John D. Brazzle, Frederick E. Beville, David R. Ng, Michael J. Anderson, Yucheng Ying
  • Patent number: 10497635
    Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: December 3, 2019
    Assignee: Linear Technology Holding LLC
    Inventors: John D. Brazzle, Frederick E. Beville, David R. Ng, Michael J. Anderson, Yucheng Ying
  • Publication number: 20190304865
    Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.
    Type: Application
    Filed: October 4, 2018
    Publication date: October 3, 2019
    Inventors: John D. Brazzle, Frederick E. Beville, David R. Ng, Michael J. Anderson, Yucheng Ying
  • Patent number: 7471522
    Abstract: A regulator may include a load voltage sensing circuit configured to generate a feedback signal representative of output voltage from an isolated flyback converter. The regulator may include a pulse generator configured to controllably generate the pulses and to increase at least one off time and at least one period of the pulses after a load on the flyback converter decreases.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: December 30, 2008
    Assignee: Linear Technology Corporation
    Inventors: David R. Ng, Michael G. Negrete
  • Publication number: 20080031017
    Abstract: A regulator may include a load voltage sensing circuit configured to generate a feedback signal representative of output voltage from an isolated flyback converter. The regulator may include a pulse generator configured to controllably generate the pulses and to increase at least one off time and at least one period of the pulses after a load on the flyback converter decreases.
    Type: Application
    Filed: August 3, 2006
    Publication date: February 7, 2008
    Inventors: David R. Ng, Michael G. Negrete