Patents by Inventor David R. Pirkle

David R. Pirkle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7534363
    Abstract: A method for removing organic material over a substrate is provided. The substrate is placed in a plasma processing chamber. A first gas is provided to an inner zone within the plasma processing chamber. A second gas is provided to an outer zone of the plasma processing chamber, wherein the outer zone surrounds the inner zone and the second gas has a carbon containing component, wherein a concentration of the carbon containing component of the second gas is greater than a concentration of the carbon containing component in the first gas. Plasmas are simultaneously generated from the first gas and second gas. Some or all of the organic material is removed using the generated plasmas.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: May 19, 2009
    Assignee: Lam Research Corporation
    Inventors: Rao V. Annapragada, Odette Turmel, Kenji Takeshita, Lily Zheng, Thomas S. Choi, David R. Pirkle
  • Patent number: 6962879
    Abstract: A semiconductor manufacturing process wherein silicon nitride is plasma etched with selectivity to an overlying and/or underlying dielectric layer such as a silicon oxide or low-k material. The etchant gas includes a fluorocarbon reactant and an oxygen reactant, the ratio of the flow rate of the oxygen reactant to that of the fluorocarbon reactant being no greater than 1.5. The etch rate of the silicon nitride can be at least 5 times higher than that of the oxide. Using a combination of CH3F and O2 with optional carrier gasses such as Ar and/or N2, it is possible to obtain nitride:oxide etch rate selectivities of over 40:1. The process is useful for simultaneously removing silicon nitride in 0.25 micron and smaller contact or via openings and wide trenches in forming structures such as damascene and self-aligned structures.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: November 8, 2005
    Assignee: Lam Research Corporation
    Inventors: Helen H. Zhu, David R. Pirkle, S. M. Reza Sadjadi, Andrew S. Li
  • Patent number: 6909195
    Abstract: The present inventions is a method of trench formation within a dielectric layer, comprising, first, etching a via within the dielectric layer. After the via is etched, an organic plug is used to fill a portion of the via. After the desired amount of organic plug has been etched from the via, a trench is etched with a first gas mixture to a first depth, and a second gas mixture is used to further etch the trench to the final desired trench depth. Preferably, the method is used for low-k dielectrics that do not have an intermediate etch stop layer. Additionally, it is preferable that the first gas mixture is a polymeric gas mixture and the second gas mixture is a non-polymeric gas mixture. As a result of using this method, an interconnect structure for a low-k dielectric without an intermediate etch stop layer having a trench with trench edges that are substantially orthogonal and a via with via edges that are substantially orthogonal is generated.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: June 21, 2005
    Assignee: Lam Research Corporation
    Inventors: SiYi Li, S. M. Reza Sadjadi, David R. Pirkle, Steve Lassig, Sean Kang, Vinay Pohray, Peter Cirigliano
  • Patent number: 6794293
    Abstract: The present inventions is a method of trench formation within a dielectric layer, comprising, first, etching a via within the dielectric layer. After the via is etched, an organic plug is used to fill a portion of the via. After the desired amount of organic plug has been etched from the via, a trench is etched with a first gas mixture to a first depth, and a second gas mixture is used to further etch the trench to the final desired trench depth. Preferably, the method is used for low-k dielectrics that do not have an intermediate etch stop layer. Additionally, it is preferable that the first gas mixture is a polymeric gas mixture and the second gas mixture is a non-polymeric gas mixture. As a result of using this method, an interconnect structure for a low-k dielectric without an intermediate etch stop layer having a trench with trench edges that are substantially orthogonal and a via with via edges that are substantially orthogonal is generated.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: September 21, 2004
    Assignee: Lam Research Corporation
    Inventors: SiYi Li, S. M. Reza Sadjadi, David R. Pirkle, Steve Lassig, Sean Kang, Vinay Pohray, Peter Cirigliano
  • Publication number: 20040038540
    Abstract: The present inventions is a method of trench formation within a dielectric layer, comprising, first, etching a via within the dielectric layer. After the via is etched, an organic plug is used to fill a portion of the via. After the desired amount of organic plug has been etched from the via, a trench is etched with a first gas mixture to a first depth, and a second gas mixture is used to further etch the trench to the final desired trench depth. Preferably, the method is used for low-k dielectrics that do not have an intermediate etch stop layer. Additionally, it is preferable that the first gas mixture is a polymeric gas mixture and the second gas mixture is a non-polymeric gas mixture. As a result of using this method, an interconnect structure for a low-k dielectric without an intermediate etch stop layer having a trench with trench edges that are substantially orthogonal and a via with via edges that are substantially orthogonal is generated.
    Type: Application
    Filed: October 5, 2001
    Publication date: February 26, 2004
    Applicant: Lam Research Corporation
    Inventors: SiYi Li, S.M. Reza Sadjadi, David R. Pirkle, Stephan Lassig, Sean Kang, Vinay Pohray, Peter Cirigliano
  • Patent number: 6670278
    Abstract: The invention provides a process for plasma etching silicon carbide with selectivity to an overlapping and/or underlying dielectric layer of material. The etching gas includes a hydrogen-containing fluorocarbon gas such as CH3F, an oxygen-containing gas such as O2 and an optional carrier gas such as Ar. The dielectric material can comprise silicon dioxide, silicon nitride, silicon oxynitride or various low-k dielectric materials including organic low-k materials. In order to achieve a desired selectivity to such dielectric materials, the plasma etch gas chemistry is selected to achieve a desired etch rate of the silicon carbide while etching the dielectric material at a slower rate. The process can be used to selectively etch a hydrogenated silicon carbide etch stop layer or silicon carbide substrates.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: December 30, 2003
    Assignee: Lam Research Corporation
    Inventors: Si Yi Li, Helen H. Zhu, S. M. Reza Sadjadi, David R. Pirkle, James Bowers, Michael Goss
  • Publication number: 20020182880
    Abstract: A semiconductor manufacturing process wherein silicon nitride is plasma etched with selectivity to an overlying and/or underlying dielectric layer such as a silicon oxide or low-k material. The etchant gas includes a fluorocarbon reactant and an oxygen reactant, the ratio of the flow rate of the oxygen reactant to that of the fluorocarbon reactant being no greater than 1.5. The etch rate of the silicon nitride can be at least 5 times higher than that of the oxide. Using a combination of CH3F and O2 with optional carrier gasses such as Ar and/or N2, it is possible to obtain nitride:oxide etch rate selectivities of over 40:1. The process is useful for simultaneously removing silicon nitride in 0.25 micron and smaller contact or via openings and wide trenches in forming structures such as damascene and self-aligned structures.
    Type: Application
    Filed: March 30, 2001
    Publication date: December 5, 2002
    Inventors: Helen H. Zhu, David R. Pirkle, S.M. Reza Sadjadi, Andrew S. Li
  • Publication number: 20020177322
    Abstract: The invention provides a process for plasma etching silicon carbide with selectivity to an overlapping and/or underlying dielectric layer of material. The etching gas includes a hydrogen-containing fluorocarbon gas such as CH3F, an oxygen-containing gas such as O2 and an optional carrier gas such as Ar. The dielectric material can comprise silicon dioxide, silicon nitride, silicon oxynitride or various low-k dielectric materials including organic low-k materials. In order to achieve a desired selectivity to such dielectric materials, the plasma etch gas chemistry is selected to achieve a desired etch rate of the silicon carbide while etching the dielectric material at a slower rate. The process can be used to selectively etch a hydrogenated silicon carbide etch stop layer or silicon carbide substrates.
    Type: Application
    Filed: March 30, 2001
    Publication date: November 28, 2002
    Inventors: Si Yi Li, Helen H. Zhu, S.M. Reza Sadjadi, David R. Pirkle, James Bowers, Michael Goss
  • Patent number: 6016766
    Abstract: Ionizable gas supplied to an electron cyclotron resonance vacuum plasma processor chamber for semiconductor wafers is excited to a plasma state by microwave energy coupled to the chamber. The level of microwave power reflected from the chamber controls the level of microwave power derived from a source driving the ionizable gas in the chamber.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: January 25, 2000
    Assignee: Lam Research Corporation
    Inventors: David R. Pirkle, John Daugherty, Michael Giarratano, C. Robert Koemtzopoulos, Felix Kozakevich
  • Patent number: 5915190
    Abstract: A method for filling a trench in a semiconductor wafer that is disposed in a plasma-enhanced chemical vapor deposition chamber. The method includes the step of depositing a protection layer of silicon dioxide over the wafer and into the trench while the wafer is biased at a first RF bias level. The protection layer has a thickness that is insufficient to completely fill the trench. Further, there is provided the step of forming a trench-fill layer of silicon dioxide over the protection layer and into the trench while the wafer is biased at a second RF bias level that is higher than the first bias level.
    Type: Grant
    Filed: July 30, 1997
    Date of Patent: June 22, 1999
    Assignee: Lam Research Corporation
    Inventor: David R. Pirkle
  • Patent number: 5846373
    Abstract: Thin film deposition process endpoints and in situ-clean process endpoints are monitored using a single light filter and photodetector arrangement. The light filter has a peak transmission proximate a characteristic wavelength of the deposition plasma, such as Si, and one of the plurality of reaction products, such as NO, in the plasma chamber during in-situ cleaning. Emissions passing through the filter are converted to voltage measurements by a photodetector. In deposition endpoint monitoring, emission intensity of the Si emissions reflected off the surface of the substrate oscillate as deposition thickness increases, with each oscillation corresponding to a definite increase in thickness of the film. The endpoint of the deposition is reached when the number of oscillations in signal intensity versus time corresponds to a desired film thickness. Alternatively, a deposition rate for the film is calculated from the oscillation frequency of emissions reflected off the substrate.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: December 8, 1998
    Assignee: Lam Research Corporation
    Inventors: David R. Pirkle, Randall S. Mundt, William Harshbarger
  • Patent number: 5841623
    Abstract: A chuck for processing a substrate includes a chuck body having a dielectric layer, the dielectric layer including a substrate receiving surface, the substrate receiving surface being at least as large as a substrate to be processed on the chuck. The chuck further includes an electrode buried in the chuck body, the electrode being larger than the substrate receiving surface such that edges of a radio frequency field generated by the electrode are all disposed beyond the substrate receiving surface. A method for depositing a film in a radio frequency biased plasma chemical deposition system is also disclosed.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: November 24, 1998
    Assignee: Lam Research Corporation
    Inventors: Dean R. Denison, David R. Pirkle, Alain Harrus
  • Patent number: 5647953
    Abstract: A method for cleaning and conditioning a plasma processing chamber wherein oxide residues have been previously formed on interior surfaces of the chamber. The method includes introducing a cleaning gas including a fluorine-based gas into the chamber followed by performing a plasma cleaning step. The plasma cleaning step is performed by activating the cleaning gas mixture and forming a plasma cleaning gas, contacting interior surfaces of the chamber with the plasma cleaning gas and removing oxide residues on the interior surfaces. The cleaning step is followed by coating the interior surfaces with silicon dioxide to adhere loose particles to the interior surfaces and a conditioning step wherein uncoated interior surfaces are treated to remove fluorine therefrom. An advantage of the cleaning and conditioning method is that it is not necessary to open the chamber.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: July 15, 1997
    Assignee: LAM Research Corporation
    Inventors: Larry Williams, David R. Pirkle, William Harshbarger, Timothy Ebel