Abstract: Methods and apparatuses for automated synthesis transformation for carry save optimization and/or for the correction of dropped truncation after widening an adder. In one embodiment of the present invention, a correction input is automatically generated for a widened adder to correct the dropping or truncation of result bits that is performed by the adder before the widening. In one example the dropped result bits are part of the user's HDL specification. In another example the carry save optimization is enabled by a retiming operation. In one embodiment of the present invention, one or more logic operators between adders are pushed (e.g., forward or backward) across at least one of the adders so that the adders can be collapsed for carry save optimization. In one embodiment, an adder followed by a comparator is transformed to use a carry save adder followed by a comparator so that the carry chain in the original adder can be eliminated.

Abstract: A static debugging tool for use with a computer and for debugging a binary program file includes an analyzer for causing the computer to statically analyze a representation of a binary program file to detect the presence of program errors and potential errors in the binary program file without executing the binary program file. The static debugging tool causes the computer to output an error list of the errors and potential errors detected by the analyzer. In a preferred embodiment, the analyzer detects the errors and potential errors in the representation of the binary program file by following all of the possible flow paths of the representation of the binary program file while tracking the use of various program parameters for any inconsistent use of the various program parameters. A method for statically debugging a binary program file is also described.