Patents by Inventor David Rigel Garcia Garcia
David Rigel Garcia Garcia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11222397Abstract: This disclosure describes examples for foveation rendering. A graphics processing unit (GPU) may render image content for each tile at different sizes as part of the rendering pass after a binning pass in which the GPU determined to which tiles vertices of primitives belong. The GPU may upsample the rendered image content based on the size at which GPU rendered the image content, and output the upsampled image content for later display.Type: GrantFiled: December 23, 2016Date of Patent: January 11, 2022Assignee: QUALCOMM IncorporatedInventors: Skyler Jonathon Saleh, David Rigel Garcia Garcia, Maurice Franklin Ribble
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Publication number: 20200302284Abstract: Systems and methods for generating a representative value of a data set by first compressing a portion of values in the data set to determine a first common value and further compressing a subset of the portion of values to determine a second common value. The representative value is generated by taking the difference between the first common value and the second common value, wherein the representative value corresponds to a mathematical relationship between the first and second common values and each value within the subset of the portion of values. The representative value requires less storage than the first and second common values.Type: ApplicationFiled: March 18, 2019Publication date: September 24, 2020Inventor: David Rigel Garcia Garcia
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Patent number: 10410313Abstract: This disclosure describes examples for determining an amount of foveation that is to be applied for rendering an image. The example techniques may use information indicative of a performance of a graphics processing unit (GPU) to determine the amount of foveation that is to be applied. The GPU may render an image based on the determined amount of foveation.Type: GrantFiled: August 5, 2016Date of Patent: September 10, 2019Assignee: QUALCOMM IncorporatedInventors: Skyler Jonathon Saleh, Maurice Franklin Ribble, David Rigel Garcia Garcia
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Patent number: 10282813Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.Type: GrantFiled: February 13, 2018Date of Patent: May 7, 2019Assignee: QUALCOMM IncorporatedInventors: Murat Balci, Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala Gadda Nagendra Kumar, Colin Christopher Sharp, David Rigel Garcia Garcia
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Patent number: 10255106Abstract: A device for processing data includes a processing unit configured to predict an execution time of a compute kernel on a secondary processing unit and, based on the predicted execution time, make a power management decision for the secondary processing unit.Type: GrantFiled: January 27, 2016Date of Patent: April 9, 2019Assignee: QUALCOMM IncorporatedInventors: Navid Farazmand, Eduardus Antonius Metz, David Rigel Garcia Garcia
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Patent number: 10210593Abstract: A graphics processing unit (GPU) may dispatch a first set of commands for execution on one or more processing units of the GPU. The GPU may receive notification from a host device indicating that a second set of commands are ready to execute on the GPU. In response, the GPU may issue a first preemption command at a first preemption granularity to the one or more processing units. In response to the GPU failing to preempt execution of the first set of commands within an elapsed time period after issuing the first preemption command, the GPU may issue a second preemption command at a second preemption granularity to the one or more processing units, where the second preemption granularity is finer-grained than the first preemption granularity.Type: GrantFiled: January 28, 2016Date of Patent: February 19, 2019Assignee: QUALCOMM IncorporatedInventors: Anirudh Rajendra Acharya, Alexei Vladimirovich Bourd, David Rigel Garcia Garcia, Milind Nilkanth Nemlekar, Vineet Goel
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Patent number: 10134103Abstract: A method of data processing, the method comprising receiving, at a graphics processing unit (GPU), a command stream, the command stream including one or more commands to be performed by the GPU and at least one command stream marker, the at least one command stream marker indicating a workload type of the command stream, determining, by the GPU, an operation algorithm for the GPU based on the at least one command stream marker prior to executing the command stream, and executing, by the GPU, the command stream based on the operation algorithm.Type: GrantFiled: March 29, 2016Date of Patent: November 20, 2018Assignee: QUALCOMM IncorporatedInventors: Anirudh Rajendra Acharya, David Rigel Garcia Garcia, Nigel Terence Poole
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Publication number: 20180182066Abstract: This disclosure describes examples for foveation rendering. A graphics processing unit (GPU) may render image content for each tile at different sizes as part of the rendering pass after a binning pass in which the GPU determined to which tiles vertices of primitives belong. The GPU may upsample the rendered image content based on the size at which GPU rendered the image content, and output the upsampled image content for later display.Type: ApplicationFiled: December 23, 2016Publication date: June 28, 2018Inventors: Skyler Jonathon Saleh, David Rigel Garcia Garcia, Maurice Franklin Ribble
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Publication number: 20180165788Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.Type: ApplicationFiled: February 13, 2018Publication date: June 14, 2018Inventors: Murat Balci, Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala Gadda Nagendra Kumar, Colin Christopher Sharp, David Rigel Garcia Garcia
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Patent number: 9928565Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.Type: GrantFiled: April 20, 2015Date of Patent: March 27, 2018Assignee: QUALCOMM IncorporatedInventors: Murat Balci, Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala gadda Nagendra Kumar, Colin Christopher Sharp, David Rigel Garcia Garcia
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Publication number: 20180040097Abstract: This disclosure describes examples for determining an amount of foveation that is to be applied for rendering an image. The example techniques may use information indicative of a performance of a graphics processing unit (GPU) to determine the amount of foveation that is to be applied. The GPU may render an image based on the determined amount of foveation.Type: ApplicationFiled: August 5, 2016Publication date: February 8, 2018Inventors: Skyler Jonathon Saleh, Maurice Franklin Ribble, David Rigel Garcia Garcia
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Patent number: 9799089Abstract: A method for processing data in a graphics processing unit including receiving a code block of instructions common to a plurality of groups of threads of a shader, executing the code block of instructions common to the plurality of groups of threads of the shader creating a result by a first group of threads of the plurality of groups of threads, storing the result of the code block of instructions common to the plurality of groups of threads of the shader in on-chip random access memory (RAM), the on-chip RAM accessible by each of the plurality of groups of threads, and upon a determination that storing the result of the code block of instructions common to the plurality of groups of threads of the shader has completed, returning the result of the code block of instructions common to the plurality of groups of threads of the shader from on-chip RAM.Type: GrantFiled: May 23, 2016Date of Patent: October 24, 2017Assignee: QUALCOMM IncorporatedInventors: Lin Chen, Yun Du, Andrew Evan Gruber, Guofang Jiao, Chun Yu, David Rigel Garcia Garcia
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Publication number: 20170221173Abstract: A graphics processing unit (GPU) may dispatch a first set of commands for execution on one or more processing units of the GPU. The GPU may receive notification from a host device indicating that a second set of commands are ready to execute on the GPU. In response, the GPU may issue a first preemption command at a first preemption granularity to the one or more processing units. In response to the GPU failing to preempt execution of the first set of commands within an elapsed time period after issuing the first preemption command, the GPU may issue a second preemption command at a second preemption granularity to the one or more processing units, where the second preemption granularity is finer-grained than the first preemption granularity.Type: ApplicationFiled: January 28, 2016Publication date: August 3, 2017Inventors: Anirudh Rajendra Acharya, Alexei Vladimirovich Bourd, David Rigel Garcia Garcia, Milind Nilkanth Nemlekar, Vineet Goel
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Publication number: 20170212563Abstract: A device for processing data includes a processing unit configured to predict an execution time of a compute kernel on a secondary processing unit and, based on the predicted execution time, make a power management decision for the secondary processing unit.Type: ApplicationFiled: January 27, 2016Publication date: July 27, 2017Applicants: QUALCOMM Incorporated, QUALCOMM IncorporatedInventors: Navid Farazmand, Eduardus Antonius Metz, David Rigel Garcia Garcia
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Patent number: 9645866Abstract: This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.Type: GrantFiled: September 16, 2011Date of Patent: May 9, 2017Assignee: QUALCOMM IncorporatedInventors: Alexei V. Bourd, Colin Christopher Sharp, David Rigel Garcia Garcia, Chihong Zhang
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Publication number: 20170116701Abstract: A method of data processing, the method comprising receiving, at a graphics processing unit (GPU), a command stream, the command stream including one or more commands to be performed by the GPU and at least one command stream marker, the at least one command stream marker indicating a workload type of the command stream, determining, by the GPU, an operation algorithm for the GPU based on the at least one command stream marker prior to executing the command stream, and executing, by the GPU, the command stream based on the operation algorithm.Type: ApplicationFiled: March 29, 2016Publication date: April 27, 2017Inventors: Anirudh Rajendra Acharya, David Rigel Garcia Garcia, Nigel Terence Poole
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Patent number: 9626234Abstract: This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.Type: GrantFiled: December 15, 2014Date of Patent: April 18, 2017Assignee: QUALCOMM IncorporatedInventors: Alexei Vladimirovich Bourd, Colin Christopher Sharp, David Rigel Garcia Garcia, Chihong Zhang
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Publication number: 20150302546Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.Type: ApplicationFiled: April 20, 2015Publication date: October 22, 2015Inventors: Murat Balci, Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala gadda Nagendra Kumar, Colin Christopher Sharp, David Rigel Garcia Garcia
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Patent number: 9134954Abstract: This disclosure proposes techniques for demand paging for an IO device (e.g., a GPU) that utilize pre-fetch and pre-back notification event signaling to reduce latency associated with demand paging. Page faults are limited by performing the demand paging operations prior to the IO device actually requesting unbacked memory.Type: GrantFiled: September 10, 2012Date of Patent: September 15, 2015Assignee: QUALCOMM IncorporatedInventors: Colin Christopher Sharp, David Rigel Garcia Garcia, Eduardus A. Metz
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Publication number: 20150097849Abstract: This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.Type: ApplicationFiled: December 15, 2014Publication date: April 9, 2015Inventors: Alexei Vladimirovich Bourd, Colin Christopher Sharp, David Rigel Garcia Garcia, Chihong Zhang