Abstract: A video display system employs a memory arrangement for the video data which is sequentially accessed for serial read-out of the bit-mapped video information at a high clock rate, and also randomly accessed in parallel by a microcomputer for generating and updating the information to be displayed. Parallel access to the memory by the microcomputer can occur while the serial video data is being clocked out, so microcomputer I/O and video output conflict only a very minimum amount. Dynamic MOS RAMs with a serial register added provide this dual port memory.

Abstract: An electronic system located upon a single semiconductor substrate including a plurality of isolated electronic subsystems located upon the semiconductor substrate. Each electronic subsystem includes a plurality of input/output lines. Several information bus lines are included that are connected to addressable transistors located between the individual bus lines and the input/output lines. An addressing means is connected to the addressable transistors for addressing each of the addressable transistors and for providing a first state signal indicating an ON condition to the first select group of said addressable transistors, electrically connecting the information bus lines to the input/output lines and a second state signal indicating an OFF condition to a second selected group of the addressable transistors, electrically isolating the information bus lines from the input/output lines. The addressable transistors maintain the state signal indicated condition.

Abstract: A video display system employs a memory arrangement for the video data which is sequentially accessed for serial read-out of the bit-mapped video information at a high clock rate, and also randomly accessed in parallel by a microcomputer for generating and updating the information to be displayed. Parallel access to the memory by the microcomputer can occur while the serial video data is being clocked out, so microcomputer I/O and video output conflict only a very minimum amount. Dynamic MOS RAMs with a serial register added provide this dual port memory.

Abstract: An electronic connection socket for connecting an electronic package and including a body of nonconductive material, an electronic device fabricated upon a semiconductor substrate located upon the body. The electronic device includes several bonding pads. The socket includes a set of pins to provide interconnection to external electronic devices. The body also includes pin sockets providing interconnection to the electronic package. The pins and pin sockets of the body are also connected to the bonding pads of the electronic device. To provide the electrical interconnection between the electronic package, the electronic device located upon the semiconductor substrate in the socket body and the external circuitry connected to the body.

Abstract: A microcomputer system has a microprocessor whose functions are implemented by instructions and data from a directly connected random access memory (RAM). The capacity of the RAM is less than the typical total instruction list for the microprocessor. A read-only mass memory is connected to the RAM and has permanently stored instructions set therein for the microprocessor. A controller controls the flow of instructions from the mass memory to the RAM as required and also controls the flow of instructions and data between the RAM and microprocessor. The instructions from the mass memory are overlayed in the RAM in areas no longer required for instruction execution.