Patents by Inventor David Sing

David Sing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130134612
    Abstract: A method for fragmenting a bubble of compressed gas released from a compressed gas reservoir situated at a depth under a water surface. The method comprises maintaining a grid disposed between the reservoir and the water surface to fragment the bubble into a plurality of fragmented bubble portions, the grid allowing passage therethrough of the fragmented bubble portions of the body of compressed gas generally along a travel path.
    Type: Application
    Filed: November 24, 2011
    Publication date: May 30, 2013
    Inventors: Cameron Phillip Lewis, David Sing-Khing Ting, Edward Christian Janson Carrtveau, Ning Cao
  • Patent number: 7642163
    Abstract: An electronic device can include a nonvolatile memory cell having DSEs within a dielectric layer. In one aspect, a process of forming the electronic device can include implanting and nucleating a first charge-storage material to form DSEs. The process can also include implanting a second charge-storage material and growing the DSEs such that the DSEs include the first and second charge-storage material. In another aspect, a process of forming the electronic device can include forming a semiconductor layer over a dielectric layer, implanting a charge-storage material, and annealing the dielectric layer. After annealing, substantially none of the charge-storage material remains within a denuded zone within the dielectric layer. In a third aspect, within a dielectric layer, a first set of DSEs can be spaced apart from a second set of DSEs, wherein substantially no DSEs lie between the first set of DSEs and the second set of DSEs.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 5, 2010
    Assignee: Freescale Semiconductor, Inc
    Inventors: Rajesh A. Rao, Tushar P. Merchant, Ramachandran Muralidhar, Gowrishankar Chindalore, David Sing, Jane Yater
  • Publication number: 20080242022
    Abstract: An electronic device can include a nonvolatile memory cell having DSEs within a dielectric layer. In one aspect, a process of forming the electronic device can include implanting and nucleating a first charge-storage material to form DSEs. The process can also include implanting a second charge-storage material and growing the DSEs such that the DSEs include the first and second charge-storage material. In another aspect, a process of forming the electronic device can include forming a semiconductor layer over a dielectric layer, implanting a charge-storage material, and annealing the dielectric layer. After annealing, substantially none of the charge-storage material remains within a denuded zone within the dielectric layer. In a third aspect, within a dielectric layer, a first set of DSEs can be spaced apart from a second set of DSEs, wherein substantially no DSEs lie between the first set of DSEs and the second set of DSEs.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Rajesh A. Rao, Tushar P. Merchant, Ramachandran Muralidhar, Gowrishankar Chindalore, David Sing, Jane Yater
  • Publication number: 20070172996
    Abstract: A semiconductor device is formed by patterning a semiconductor layer to create a vertical active region and a horizontal active region, wherein the horizontal active region is adjacent the vertical active region. The semiconductor layer overlies an insulating layer. A spacer is formed adjacent the vertical active region and over a portion of the horizontal active region. At least a portion of the horizontal active region is oxidized to form an isolation region. The spacer is removed. A gate dielectric is formed over the vertical active region after removing the spacer. A gate electrode is formed over the gate dielectric. However, forming the spacer is optional.
    Type: Application
    Filed: January 25, 2006
    Publication date: July 26, 2007
    Inventors: Leo Mathew, David Sing, Venkat Kolagunta
  • Publication number: 20060223335
    Abstract: A method for forming a semiconductor device including forming a semiconductor substrate; forming a gate electrode over the semiconductor substrate having a first side and a second side, and forming a gate dielectric under the gate electrode. The gate dielectric has a first area under the gate electrode and adjacent the first side of the gate electrode, a second area under the gate electrode and adjacent the second side of the gate electrode, and a third area under the gate electrode that is between the first area and the second area, wherein the first area is thinner than the second area, and the third area is thinner than the first area and is thinner than the second area.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 5, 2006
    Inventors: Leo Mathew, Venkat Kolagunta, David Sing