Abstract: A system may include receiving a packet, of a packet stream, including control tags in a header portion of the packet and classifying each of the control tags into a category selected from a set of possible categories. The set of possible categories may include an unambiguous interposable (UI) category that is assigned to a control tag that corresponds to an unambiguous parsing interpretation and that is interposable within a sequence of the control tags, and an ambiguous interposable (AI) category that is assigned to a control tag in which the control tag has an ambiguous parsing interpretation and in which the control tag is interposable within the sequence of the control tags. The method may further include determining parsing operations to perform for the packet based on the classified categories of the control tags and based on the packet stream of the packet.

Abstract: A system may include receiving a packet, of a packet stream, including control tags in a header portion of the packet and classifying each of the control tags into a category selected from a set of possible categories. The set of possible categories may include an unambiguous interposable (UI) category that is assigned to a control tag that corresponds to an unambiguous parsing interpretation and that is interposable within a sequence of the control tags, and an ambiguous interposable (AI) category that is assigned to a control tag in which the control tag has an ambiguous parsing interpretation and in which the control tag is interposable within the sequence of the control tags. The method may further include determining parsing operations to perform for the packet based on the classified categories of the control tags and based on the packet stream of the packet.

Abstract: A system may include receiving a packet, of a packet stream, including control tags in a header portion of the packet and classifying each of the control tags into a category selected from a set of possible categories. The set of possible categories may include an unambiguous interposable (UI) category that is assigned to a control tag that corresponds to an unambiguous parsing interpretation and that is interposable within a sequence of the control tags, and an ambiguous interposable (AI) category that is assigned to a control tag in which the control tag has an ambiguous parsing interpretation and in which the control tag is interposable within the sequence of the control tags. The method may further include determining parsing operations to perform for the packet based on the classified categories of the control tags and based on the packet stream of the packet.

Abstract: A data read/write system receives a key associated with a data read request. The data read/write system hashes the key to obtain a first hash value and hashes the key to obtain a second hash value, where the second hash value is different than the first hash value. The data read/write system obtains a pointer from a pointer array using the first and second hash values, and uses one or more bits of the pointer and the first hash value to retrieve data from a data look-up array.

Abstract: A data read/write system receives a key associated with a data read request. The data read/write system hashes the key to obtain a first hash value and hashes the key to obtain a second hash value, where the second hash value is different than the first hash value. The data read/write system obtains a pointer from a pointer array using the first and second hash values, and uses one or more bits of the pointer and the first hash value to retrieve data from a data look-up array.

Abstract: Provided is a 10Base-T MAC to PHY interface requiring only two wires (pins) per port, with two additional global wires: a clock wire (pin), and a synchronization wire (pin). This reduction in the number of pins associated with each port is achieved by time-division multiplexing wherein each time-division multiplexed wire combines a plurality of definitions from the conventional seven-wire interface. As a result, each port has its own pair of associated time-division multiplexed wires (pins) and the addition of each port simply requires two additional wires. According to a preferred embodiment of the present invention, information normally transferred on nine wires in a conventional seven-wire interface at 10 MHz is time-division multiplexed onto two wires (corresponding to two pins) that transfer data at 40 MHz, four times the speed of conventional interfaces. Importantly, this multiplexing is done on a port by port basis.

Abstract: Provided is a 10Base-T MAC to PHY interface requiring only two wires (pins) per port, with two additional global wires: a clock wire (pin), and a synchronization wire (pin). This reduction in the number of pins associated with each port is achieved by time-division multiplexing wherein each time-division multiplexed wire combines a plurality of definitions from the conventional seven-wire interface. As a result, each port has its own pair of associated time-division multiplexed wires (pins) and the addition of each port simply requires two additional wires. According to a preferred embodiment of the present invention, information normally transferred on nine wires in a conventional seven-wire interface at 10 MHz is time-division multiplexed onto two wires (corresponding to two pins) that transfer data at 40 MHz, four times the speed of conventional interfaces. Importantly, this multiplexing is done on a port by port basis.