Abstract: Provided herein are techniques for characterizing a test fixture that is used for connecting a device under test (DUT) to a vector network analyzer (VNA), e.g., to thereby enable de-embedding of the test fixture from measurements of the DUT connected to the test fixture. In an embodiment, the test fixture is separated into 4-port test fixture segments, based on which ports of the DUT have internal coupling. Each test fixture segment has an outer 2-port reference plane and an inner 2-port reference plane. A 4-port calibration is performed at outer planes of the two test fixture segments, while corresponding ports of the inner planes of the test fixture segments are connected together with thru segments, to thereby determine a thru set of S-parameters. A set of S-parameters is determined for each of the 4-port test fixture segments, based on the thru set of S-parameters.

Abstract: Provided herein are techniques for characterizing a test fixture that is used for connecting a device under test (DUT) to a vector network analyzer (VNA), e.g., to thereby enable de-embedding of the test fixture from measurements of the DUT connected to the test fixture. In an embodiment, the test fixture is separated into 4-port test fixture segments, based on which ports of the DUT have internal coupling. Each test fixture segment has an outer 2-port reference plane and an inner 2-port reference plane. A 4-port calibration is performed at outer planes of the two test fixture segments, while corresponding ports of the inner planes of the test fixture segments are connected together with thru segments, to thereby determine a thru set of S-parameters. A set of S-parameters is determined for each of the 4-port test fixture segments, based on the thru set of S-parameters.

Abstract: Techniques are provided for performing full N-port calibrations in an environment in which a test set is used to connect an N-port DUT to an M-port VNA, where N>M. Techniques for incorporating port impedances as part of a calibration sequence are provided. Also provided are techniques for using sequential characterization and de-embedding to generate virtual calibrations that are then used in a renormalization process.

Abstract: Techniques are provided for performing full N-port calibrations in an environment in which a test set is used to connect an N-port DUT to an M-port VNA, where N>M. Techniques for incorporating port impedances as part of a calibration sequence are provided. Also provided are techniques for using sequential characterization and de-embedding to generate virtual calibrations that are then used in a renormalization process.