Patents by Inventor David Yiu
David Yiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11929802Abstract: An unmanned aerial vehicle can be configured to adjust a beam direction, provide path information, act as a base station, act as a cluster head, include an improved directional antenna or array of directional antennas, communicate in a collaboration using belief propagation, receive communications from a serving station aiding in navigation or improved signal performance, or the like.Type: GrantFiled: November 27, 2019Date of Patent: March 12, 2024Assignee: Apple Inc.Inventors: Feng Xue, Mustafa Akdeniz, Seong-Youp John Suh, Shu-Ping Yeh, Eduardo Alban, Philippe Auzas, Jonathan Byrne, Mark Davis, David Gomez Gutierrez, Timo Huusari, Bradley Alan Jackson, Ranganadh Karella, Sreenivas Kasturi, Mengkun Ke, Ching-Yu Liao, Tiefeng Shi, Daniel Tong, Candy Yiu
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Patent number: 10496461Abstract: A method of emulating an instruction includes identifying a fault instruction. The fault instruction is saved in a register. The fault instruction is associated with a software emulated operation. The software emulated operation is initiated with an access to the fault instruction in the register.Type: GrantFiled: June 15, 2011Date of Patent: December 3, 2019Assignee: ARM Finance Overseas LimitedInventor: David Yiu-Man Lau
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Patent number: 10318290Abstract: A first floating-point operation unit receives first and second variables and performs a first operation generating a first output. A first rounding unit receives and rounds the first output to generate a second output if a control bit is in a first state. A second floating-point operation unit receives a third variable and either the first output or the second output and performs a second operation on the third variable and either the first output or the second output, to generate a third output. The second floating-point operation unit receives and operates on the first output if the control bit is in the first state, or the second output if the control bit is in the second state. A second rounding unit receives and rounds the third output.Type: GrantFiled: May 24, 2017Date of Patent: June 11, 2019Assignee: ARM Finance Overseas LimitedInventor: David Yiu-Man Lau
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Publication number: 20170255464Abstract: A first floating-point operation unit receives first and second variables and performs a first operation generating a first output. A first rounding unit receives and rounds the first output to generate a second output if a control bit is in a first state. A second floating-point operation unit receives a third variable and either the first output or the second output and performs a second operation on the third variable and either the first output or the second output, to generate a third output. The second floating-point operation unit receives and operates on the first output if the control bit is in the first state, or the second output if the control bit is in the second state. A second rounding unit receives and rounds the third output.Type: ApplicationFiled: May 24, 2017Publication date: September 7, 2017Inventor: David Yiu-Man Lau
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Patent number: 9690579Abstract: A first floating-point operation unit receives first and second variables and performs a first operation generating a first output. A first rounding unit receives and rounds the first output to generate a second output if a control bit is in a first state. A second floating-point operation unit receives a third variable and either the first output or the second output and performs a second operation on the third variable and either the first output or the second output, to generate a third output. The second floating-point operation unit receives and operates on the first output if the control bit is in the first state, or the second output if the control bit is in the second state. A second rounding unit receives and rounds the third output.Type: GrantFiled: December 29, 2014Date of Patent: June 27, 2017Assignee: ARM Finance Overseas LimitedInventor: David Yiu-Man Lau
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Publication number: 20150121044Abstract: A first floating-point operation unit receives first and second variables and performs a first operation generating a first output. A first rounding unit receives and rounds the first output to generate a second output if a control bit is in a first state. A second floating-point operation unit receives a third variable and either the first output or the second output and performs a second operation on the third variable and either the first output or the second output, to generate a third output. The second floating-point operation unit receives and operates on the first output if the control bit is in the first state, or the second output if the control bit is in the second state. A second rounding unit receives and rounds the third output.Type: ApplicationFiled: December 29, 2014Publication date: April 30, 2015Inventor: David Yiu-Man Lau
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Patent number: 8924454Abstract: A first floating-point operation unit receives first and second variables and performs a first operation generating a first output. A first rounding unit receives and rounds the first output to generate a second output if a control bit is in a first state. A second floating-point operation unit receives a third variable and either the first output or the second output and performs a second operation on the third variable and either the first output or the second output, to generate a third output. The second floating-point operation unit receives and operates on the first output if the control bit is in the first state, or the second output if the control bit is in the second state. A second rounding unit receives and rounds the third output.Type: GrantFiled: January 25, 2012Date of Patent: December 30, 2014Assignee: Arm Finance Overseas LimitedInventor: David Yiu-Man Lau
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Publication number: 20130191426Abstract: A first floating-point operation unit receives first and second variables and performs a first operation generating a first output. A first rounding unit receives and rounds the first output to generate a second output if a control bit is in a first state. A second floating-point operation unit receives a third variable and either the first output or the second output and performs a second operation on the third variable and either the first output or the second output, to generate a third output. The second floating-point operation unit receives and operates on the first output if the control bit is in the first state, or the second output if the control bit is in the second state. A second rounding unit receives and rounds the third output.Type: ApplicationFiled: January 25, 2012Publication date: July 25, 2013Applicant: MIPS TECHNOLOGIES, INC.Inventor: David Yiu-Man Lau
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Patent number: 8469812Abstract: A fret and method of making the fret are disclosed. The fret can include a body portion made of a non-conductive material, a first end, a second end, and a length defined between the first and second ends. A plurality of electrically conductive elements can be disposed along at least part of the body portion. Each element can be electrically insulated from the other conductive elements by the body portion. The method can include 1) providing a blank formed of electrically conductive material, 2) processing the blank to provide a plurality of electrically conductive elements, 3) affixing a body portion made of a non-conductive material to the plurality of electrically conductive elements, the body portion electrically insulating each element from the other conductive elements, and 4) removing material from the processed blank and affixed body portion to form a perimeter of the fret in a desired shape.Type: GrantFiled: March 8, 2010Date of Patent: June 25, 2013Assignee: 745 LLCInventors: Bernard Chiu, Mark Izen, Paul Franzosa, Andrea Gaiter, Wendy Mittelstadt, Ilissa Schild, Craig Small, Gabriel Viani, Stephen Paul Webster, David Yiu
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Patent number: 8454418Abstract: Stringed instruments, game controllers, and related structures and methods are described. A game controller having one or more strings is described for a computer gaming application. A plurality of frets can be disposed on a fingerboard and underlying the strings. The frets may include electrically conductive zones that can be electrically insulated from each other, and each zone corresponds to a different string. A polyphonic pickup having a plurality of wire-wound coils coupled to corresponding magnetic returns can be included, and can be adapted to detect striking of at least one of the strings by a user of the game controller. Output signals may be sent from the controller to the gaming application indicative of fingering of the game controller and the time at which the strings of the game controller are struck. Multi-mode apparatus are also described. A stringed apparatus may be used as both a game controller and an instrument.Type: GrantFiled: March 8, 2010Date of Patent: June 4, 2013Assignee: 745 LLCInventors: Bernard Chiu, Stephen Paul Webster, Paul Fransoza, Andrea Gaiter, Wendy Mittelstadt, Ilissa Schild, Craig Small, Gabriel Viani, David Yiu
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Patent number: 8392644Abstract: A processing system is provided consisting of an interrupt pin, multiple registers, a stack pointer, and an automatic interrupt system. The multiple registers store a number of processor states values. When the system detects an interrupt on the interrupt pin the system prepares to enter an exception mode where the automatic interrupt system causes an interrupt vector to be fetched, the stack pointer to be updated, and the processor state values to be read in parallel from the registers and stored in memory locations based on the updated stack pointer, prior to the execution of an interrupt service routine. A method for automatic hardware interrupt handling is also presented.Type: GrantFiled: July 30, 2010Date of Patent: March 5, 2013Assignee: MIPS Technologies, Inc.Inventors: Erik K. Norden, David Yiu-Man Lau, James H. Robinson
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Publication number: 20120324164Abstract: A method includes storing defined memory address segments and defined memory address segment attributes for a processor. The processor is operated in accordance with the defined memory address segments and defined memory address segment attributes.Type: ApplicationFiled: June 15, 2011Publication date: December 20, 2012Applicant: MIPS TECHNOLOGIES, INC.Inventor: David Yiu-Man Lau
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Publication number: 20120323552Abstract: A method of emulating an instruction includes identifying a fault instruction. The fault instruction is saved in a register. The fault instruction is associated with a software emulated operation. The software emulated operation is initiated with an access to the fault instruction in the register.Type: ApplicationFiled: June 15, 2011Publication date: December 20, 2012Applicant: MIPS TECHNOLOGIES, INC.Inventor: David Yiu-Man Lau
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Publication number: 20120030392Abstract: A processing system is provided consisting of an interrupt pin, multiple registers, a stack pointer, and an automatic interrupt system. The multiple registers store a number of processor states values. When the system detects an interrupt on the interrupt pin the system prepares to enter an exception mode where the automatic interrupt system causes an interrupt vector to be fetched, the stack pointer to be updated, and the processor state values to be read in parallel from the registers and stored in memory locations based on the updated stack pointer, prior to the execution of an interrupt service routine.Type: ApplicationFiled: July 30, 2010Publication date: February 2, 2012Applicant: MIPS Technologies, Inc.Inventors: Erik K. Norden, David Yiu-Man Lau, James H. Robinson
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Publication number: 20110218022Abstract: Stringed instruments, game controllers, and related structures and methods are described. A game controller having one or more strings is described for a computer gaming application. A plurality of frets can be disposed on a fingerboard and underlying the strings. The frets may include electrically conductive zones that can be electrically insulated from each other, and each zone corresponds to a different string. A polyphonic pickup having a plurality of wire-wound coils coupled to corresponding magnetic returns can be included, and can be adapted to detect striking of at least one of the strings by a user of the game controller. Output signals may be sent from the controller to the gaming application indicative of fingering of the game controller and the time at which the strings of the game controller are struck. Multi-mode apparatus are also described. A stringed apparatus may be used as both a game controller and an instrument.Type: ApplicationFiled: March 8, 2010Publication date: September 8, 2011Applicant: 745 LLCInventors: Bernard Chiu, Stephen Paul Webster, Paul Fransoza, Andrea Gaiter, Wendy Mittelstadt, Ilissa Schild, Craig Small, Gabriel Viani, David Yiu
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Patent number: 7960632Abstract: Drum kits and connector assemblies for connecting components of drum kits are described. Some of the described connector assemblies are configured to provide one or more pre-defined acceptable interconnection orientations. Some of the described connector assemblies facilitate easy interconnection and disconnection of components of a drum kit. Described interconnection types include snap connections and locking interconnections, among others.Type: GrantFiled: November 13, 2009Date of Patent: June 14, 2011Assignee: First Act Inc.Inventors: Mark Izen, Suzanne Wasserman, Andrea Gaiter, David Yiu
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Publication number: 20110113948Abstract: Drum kits and connector assemblies for connecting components of drum kits are described. Some of the described connector assemblies are configured to provide one or more pre-defined acceptable interconnection orientations. Some of the described connector assemblies facilitate easy interconnection and disconnection of components of a drum kit. Described interconnection types include snap connections and locking interconnections, among others.Type: ApplicationFiled: November 13, 2009Publication date: May 19, 2011Applicant: First Act, Inc.Inventors: Mark Izen, Suzanne Wasserman, Andrea Gaiter, David Yiu
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Publication number: 20100312991Abstract: A re-encoded instruction set architecture (ISA) provides smaller bit-width instructions or a combination of smaller and larger bit-width instructions to improve instruction execution efficiency and reduce code footprint. The ISA can be re-encoded from a legacy ISA having larger bit-width instructions, and the re-encoded ISA can maintain assembly-level compatibility with the ISA from which it is derived. In addition, the re-encoded ISA can have new and different types of additional instructions, including instructions with encoded arguments determined by statistical analysis and instructions that have the effect of combinations of instructions.Type: ApplicationFiled: March 26, 2010Publication date: December 9, 2010Applicant: MIPS Technologies, Inc.Inventors: Erik K. NORDEN, James Hippisley Robinson, David Yiu-Man Lau
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Publication number: 20100234109Abstract: A fret and method of making the fret are disclosed. The fret can include a body portion made of a non-conductive material, a first end, a second end, and a length defined between the first and second ends. A plurality of electrically conductive elements can be disposed along at least part of the body portion. Each element can be electrically insulated from the other conductive elements by the body portion. The method can include 1) providing a blank formed of electrically conductive material, 2) processing the blank to provide a plurality of electrically conductive elements, 3) affixing a body portion made of a non-conductive material to the plurality of electrically conductive elements, the body portion electrically insulating each element from the other conductive elements, and 4) removing material from the processed blank and affixed body portion to form a perimeter of the fret in a desired shape.Type: ApplicationFiled: March 8, 2010Publication date: September 16, 2010Applicant: 745 LLCInventors: Bernard Chiu, Mark Izen, Paul Fransoza, Andrea Gaiter, Wendy Mittelstadt, Ilissa Schild, Craig Small, Gabriel Viani, Stephen Paul Webster, David Yiu
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Publication number: 20090051608Abstract: A mast that includes an omnidirectional antenna disposed therein and a GPS antenna coupled with the mast. Both the omnidirectional antenna and the GPS antenna preferably are protected from the environment, with the omnidirectional antenna being located above the GPS antenna when the mast is positioned vertically.Type: ApplicationFiled: August 20, 2007Publication date: February 26, 2009Applicant: MODULAR MINING SYSTEMS, INC.Inventors: Romer D. Johnson, Christian H. Carrasco, David Yiu