Abstract: Disclosed are methods and devices of processing a low-dose computed tomography (CT) image. The present disclosure provides a method of processing a low-dose CT image. The method comprises: receiving a first chest image; receiving a first chest image; detecting at least one lung nodule in the first chest image; determining at least one lung nodule region of the first chest image based on the at least one lung nodule; and classifying the at least one lung nodule region based on a first set of radiomics features of the at least one lung nodule region of the first chest image to obtain a nodule score of the at least one lung nodule in the lung nodule region. The first chest image generated by a low-dose CT method.

Abstract: In a general aspect, a head-mounted device (HMD) can be configured to receive a selection of a mode of operation of a content reader of the HMD from a plurality of modes of operation, and initiate, in response to the selection, a content capture process to capture content within a field of view (FOV) of a camera of the HMD. The HMD can be further configured to identify, in the captured content, a plurality of content items, receive a navigation command to select a content item from the plurality of content items, and provide, in response to the navigation command, readback of the selected content item.

Abstract: A computer-implemented method for providing an offer in a social context includes: identifying, using one or more processors, an upcoming event comprising a purchasing opportunity that is uniquely associated with a group of users connected to each other in a social network; selecting, using one or more processors, at least one offer based on the identified upcoming event; and presenting the selected at least one offer to at least one of the group of users in the social network in association with the upcoming event.

Abstract: A synchronous cache memory power conservation apparatus for conserving power of the cache SRAM memory blocks in cached computer systems. The power conservation apparatus is included as a portion of the logic of the cache controller of the computer system. The power conservation apparatus monitors the CPU bus cycles in order to shut off the clocking signals supplied to the cache SRAM memory blocks when the CPU is not accessing the cache memory, thereby reducing the power consumption of the high-power SRAM devices. The power conservation apparatus resumes standard synchronized clocking to the cache SRAM blocks when the CPU is performing a cache-hit memory access cycle for maximum cache access performance.