Patents by Inventor Davide Luigi Brambilla
Davide Luigi Brambilla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230378923Abstract: In an embodiment, an amplifier circuit includes a second stage that includes a first switch circuit including first and second terminals, a plurality of resistive elements coupled between the first and second terminals of the first switch circuit, and a plurality of switches configured to control an equivalent resistance between the first and second terminals of the first switch circuit. During play mode, the second stage has a gain between the input of the second stage and the output of the second stage of a first value. During a transition from mute mode to play mode, the amplifier circuit is configured to progressively increase the gain of the second stage from a second value to the first value. During a transition from play mode to mute mode, the amplifier circuit is configured to progressively decrease the gain of the second stage from the first value to the second value.Type: ApplicationFiled: May 18, 2022Publication date: November 23, 2023Inventors: Jian Wen, Davide Luigi Brambilla, Qiyu Liu, Mei Yang, Shuming Tong, Francesco Stilgenbauer
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Patent number: 11245369Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.Type: GrantFiled: July 22, 2020Date of Patent: February 8, 2022Assignee: STMicroelectronics S.r.l.Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
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Patent number: 10935592Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.Type: GrantFiled: August 7, 2018Date of Patent: March 2, 2021Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (SHENZHEN) R&D CO, LTD.Inventors: Edoardo Botti, Davide Luigi Brambilla, Hong Wu Lin
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Publication number: 20200350877Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.Type: ApplicationFiled: July 22, 2020Publication date: November 5, 2020Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
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Patent number: 10804796Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.Type: GrantFiled: February 6, 2019Date of Patent: October 13, 2020Assignee: STMICROELECTRONICS S.R.L.Inventors: Edoardo Botti, Arunkumar Salimath, Edoardo Bonizzoni, Franco Maloberti, Paolo Cacciagrano, Davide Luigi Brambilla
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Patent number: 10763803Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.Type: GrantFiled: February 6, 2019Date of Patent: September 1, 2020Assignee: STMICROELECTRONICS S.R.L.Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
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Publication number: 20190245435Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.Type: ApplicationFiled: February 6, 2019Publication date: August 8, 2019Inventors: Edoardo Botti, Arunkumar Salimath, Edoardo Bonizzoni, Franco Maloberti, Paolo Cacciagrano, Davide Luigi Brambilla
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Publication number: 20190245498Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.Type: ApplicationFiled: February 6, 2019Publication date: August 8, 2019Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
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Publication number: 20190049511Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.Type: ApplicationFiled: August 7, 2018Publication date: February 14, 2019Inventors: Edoardo Botti, Davide Luigi Brambilla, Hong Wu Lin