Patents by Inventor DAWSON W. KESLING

DAWSON W. KESLING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9100047
    Abstract: A method for reducing noise on a power distribution network of a printed circuit board includes determining whether a given data signal may be a problematic data signal. The given data signal is issued onto a signal distribution network of the printed circuit board if the given data signal is determined to not be a problematic data signal. The given data signal is encoded into an encoded data signal if the given data signal is determined to be a problematic data signal, and the encoded data signal is issued onto the signal distribution network.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: August 4, 2015
    Assignee: Intel Corporation
    Inventors: Alberto Alcocer Ochoa, Jose A. Sanchez Sanchez, Dawson W. Kesling, Maynard C. Falconer, Antonio Zenteno Ramirez
  • Patent number: 9054908
    Abstract: A chip is provided to include a circuit to transmit one or more data bursts, where the circuit includes burst timing logic to insert gaps of a determined length between adjacent data bursts to reduce noise at a desired frequency, where the length of each gap is to be determined based on energy of a preceding burst and a current burst.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: June 9, 2015
    Assignee: Intel Corporation
    Inventors: Dawson W. Kesling, Maynard C. Falconer
  • Patent number: 9048851
    Abstract: Described is an apparatus for providing spread-spectrum to a clock signal. The apparatus comprises: an oscillator to generate an output clock signal, the oscillator to receive an adjustable reference signal to adjust frequency of the output clock signal; a first circuit to provide a first signal indicative of a center frequency of the output clock signal; a second circuit to generate a switching waveform to provide spread-spectrum for the output clock signal; and a third circuit, coupled to the first and second circuits, to provide the adjustable reference signal according to the first signal and the switching waveform.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: June 2, 2015
    Assignee: Intel Corporation
    Inventors: Gerhard Schrom, Alexander Lyakhov, Michael W. Rogers, Dawson W. Kesling, Jonathan P. Douglas, J. Keith Hodgson
  • Patent number: 9014637
    Abstract: Examples are disclosed for switching frequency control of an on-chip or integrated voltage regulator. In some examples, a switch frequency of an integrated voltage regulator may be monitored. A determination of whether the monitored switch frequency causes radio signal interference may cause the switch frequency to be adjusted to eliminate or reduce the radio signal interference. Other examples are described and claimed.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: April 21, 2015
    Assignee: Intel Corporation
    Inventors: Harry G. Skinner, Dawson W. Kesling, Jeremy Shrall
  • Publication number: 20150093994
    Abstract: Examples are disclosed for switching frequency control of an on-chip or integrated voltage regulator. In some examples, a switch frequency of an integrated voltage regulator may be monitored. A determination of whether the monitored switch frequency causes radio signal interference may cause the switch frequency to be adjusted to eliminate or reduce the radio signal interference. Other examples are described and claimed.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: Intel Corporation
    Inventors: HARRY G. SKINNER, DAWSON W. KESLING, JEREMY SHRALL
  • Patent number: 8995594
    Abstract: Briefly, in accordance with one or more embodiments, a platform may comprise a receiver to receive a signal that includes an error in the received signal due to a noise signal generated in the platform, and a processor configured to calculate a noise vector from a source of the noise signal and to send the noise vector to the receiver, The receiver may include a digital signal processor configured to estimate an error vector based at least in part on the noise vector and to subtract the estimated error vector from the received signal to cancel the noise signal from the received signal. The noise cancelled from the received signal may include platform noise generated by a bus, a memory circuit, a clock, a power supply, a circuit ground or integrated circuit substrate, or input/output circuit of the platform.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: March 31, 2015
    Assignee: Intel Corporation
    Inventors: Dawson W. Kesling, Andrew W. Martwick
  • Patent number: 8988122
    Abstract: A terminal includes control logic to control a phase-locked loop to output a spread-spectrum clocking signal. The control logic controls the generation of the spread-spectrum clocking signal by adjusting at least one parameter of the phase-locked loop. The parameter may be a charge pump setting or a loop-filter capacitance of the phase-locked loop, or their digital equivalents. Adjustment of the parameter reduces a predetermined portion of a communications spectrum. The predetermined portion may be located within a range of frequencies allocated to a specific channel, and reduction of the spectrum in this range may serve to reduce noise associated with clocking harmonics.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: March 24, 2015
    Assignee: Intel Corporation
    Inventors: Ewunnet Gebre-Selassie, Dawson W. Kesling, Steven J. Kirch, Rahul D. Limaye, Shah M. Musa, Fugao Wang
  • Patent number: 8988255
    Abstract: A method for managing information includes receiving bits of data, determining phasors for bits at only one frequency of a transmission spectrum, combining the phasors of bits that form a phasor having a spectral energy that lies within a predetermined range, and forming a codeword from the bits of the combined phasors.
    Type: Grant
    Filed: October 1, 2011
    Date of Patent: March 24, 2015
    Assignee: Intel Corporation
    Inventors: Dawson W. Kesling, Maynard C. Falconer, Kevin P. Slattery, Harry G. Skinner
  • Publication number: 20150003500
    Abstract: Briefly, in accordance with one or more embodiments, a platform may comprise a receiver to receive a signal that includes an error in the received signal due to a noise signal generated in the platform, and a processor configured to calculate a noise vector from a source of the noise signal. The noise vector may be de-spread. The receiver may include digital signal processing configured to estimate an error vector based at least in part on the noise vector and to subtract the estimated error vector from the received signal to cancel the noise signal from the received signal. The noise cancelled from the received signal may include platform noise generated by a bus, a memory circuit, a clock, a power supply, a circuit ground or integrated circuit substrate, or input/output circuit of the platform.
    Type: Application
    Filed: June 27, 2013
    Publication date: January 1, 2015
    Inventor: Dawson W. Kesling
  • Publication number: 20140269848
    Abstract: Described is an apparatus for providing spread-spectrum to a clock signal. The apparatus comprises: an oscillator to generate an output clock signal, the oscillator to receive an adjustable reference signal to adjust frequency of the output clock signal; a first circuit to provide a first signal indicative of a center frequency of the output clock signal; a second circuit to generate a switching waveform to provide spread-spectrum for the output clock signal; and a third circuit, coupled to the first and second circuits, to provide the adjustable reference signal according to the first signal and the switching waveform.
    Type: Application
    Filed: May 31, 2013
    Publication date: September 18, 2014
    Inventors: Gerhard SCHROM, Alexander LYAKHOV, Michael W. ROGERS, Dawson W. KESLING, Jonathan P. DOUGLAS, J. Keith HODGSON
  • Publication number: 20140177752
    Abstract: In some embodiments, burst timing is provided to reduce RFI in a computing platform.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 26, 2014
    Inventors: Dawson W. Kesling, Maynard C. Falconer
  • Patent number: 8699642
    Abstract: In some embodiments, SSC (e.g., discrete SSC) profiles with intentional and controlled gaps may be used to mitigate interference for platform radios. Targeted frequency gaps are placed in spectrum of spread clocks and clock-derived signals where they may otherwise result in problematic RFI to a platform radio.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: April 15, 2014
    Assignee: Intel Corporation
    Inventors: Harry G. Skinner, Dawson W. Kesling
  • Publication number: 20140056337
    Abstract: Briefly, in accordance with one or more embodiments, a platform may comprise a receiver to receive a signal that includes an error in the received signal due to a noise signal generated in the platform, and a processor configured to calculate a noise vector from a source of the noise signal and to send the noise vector to the receiver, The receiver may include a digital signal processor configured to estimate an error vector based at least in part on the noise vector and to subtract the estimated error vector from the received signal to cancel the noise signal from the received signal. The noise cancelled from the received signal may include platform noise generated by a bus, a memory circuit, a clock, a power supply, a circuit ground or integrated circuit substrate, or input/output circuit of the platform.
    Type: Application
    Filed: August 22, 2012
    Publication date: February 27, 2014
    Inventors: Dawson W. Kesling, Andrew W. Martwick
  • Publication number: 20140015578
    Abstract: A terminal includes control logic to control a phase-locked loop to output a spread-spectrum clocking signal. The control logic controls the generation of the spread-spectrum clocking signal by adjusting at least one parameter of the phase-locked loop. The parameter may be a charge pump setting or a loop-filter capacitance of the phase-locked loop, or their digital equivalents. Adjustment of the parameter reduces a predetermined portion of a communications spectrum. The predetermined portion may be located within a range of frequencies allocated to a specific channel, and reduction of the spectrum in this range may serve to reduce noise associated with clocking harmonics.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 16, 2014
    Inventors: Ewunnet Gebre-Selassie, Dawson W. Kesling, Steven J. Kirch, Rahul D. Limaye, Shah M. Musa, Fugao Wang
  • Publication number: 20140009315
    Abstract: A method for managing information includes receiving bits of data, determining phasors for bits at only one frequency of a transmission spectrum, combining the phasors of bits that form a phasor having a spectral energy that lies within a predetermined range, and forming a codeword from the bits of the combined phasors.
    Type: Application
    Filed: October 1, 2011
    Publication date: January 9, 2014
    Inventors: Dawson W. Kesling, Maynard C. Falconer, Kevin P. Slattery, Harry G. Skinner
  • Publication number: 20120163522
    Abstract: In some embodiments, SSC (e.g., discrete SSC) profiles with intentional and controlled gaps may be used to mitigate interference for platform radios. Targeted frequency gaps are placed in spectrum of spread clocks and clock-derived signals where they may otherwise result in problematic RFI to a platform radio.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 28, 2012
    Inventors: HARRY G. SKINNER, DAWSON W. KESLING