Patents by Inventor De Wang

De Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996321
    Abstract: A method includes forming a conductive feature through a first dielectric layer, sequentially forming a second dielectric layer and a third dielectric layer over the first dielectric layer, and etching the third dielectric layer to form an opening. A first width of the opening at a top surface of the third dielectric layer is greater than a second width of the opening at a first interface between the third dielectric layer and the second dielectric layer. The method also includes etching the second dielectric layer until the opening extends to the conductive feature, thereby forming an enlarged opening, and forming a metal material in the enlarged opening. A third width of the enlarged opening at the first interface is equal to or less than a fourth width of the enlarged opening at a second interface between the second dielectric layer and the first dielectric layer.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chun Chang, Yi-Chen Wang, Yuan-Tien Tu
  • Patent number: 11990546
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: May 21, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Hua Yang, Chih-Chien Chang, Shen-De Wang
  • Publication number: 20240156993
    Abstract: A method of monitoring viability of stem cell-derived cells used in stem cell therapy comprises introducing one or more stem cell-derived cells to a cell culture media, introducing one or more nanoprobes to the cell culture media, whereby the one or more stem cell-derived cells are transfected with the one or more nanoprobes, and detecting an optical signal from the one or more nanoprobes after transfection. The method may further comprise introducing the one or more transfected stem cell-derived cells to a subject and detecting the optical signal from the one or more nanoprobes in vivo. The one or more stem cell-derived cells may include a stem cell.
    Type: Application
    Filed: January 29, 2021
    Publication date: May 16, 2024
    Inventors: Tuan VO-DINH, Matthias HEBROK, Bridget CRAWFORD, Eleonora DE KLERK, Hsin-Neng WANG
  • Patent number: 11967622
    Abstract: Embodiments provide a dielectric inter block disposed in a metallic region of a conductive line or source/drain contact. A first and second conductive structure over the metallic region may extend into the metallic region on either side of the inter block. The inter block can prevent etchant or cleaning solution from contacting an interface between the first conductive structure and the metallic region.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Patent number: 11968594
    Abstract: In some embodiments, an electronic device presents user interfaces for defining identifiers for remote locator objects. In some embodiments, an electronic device locates a remote locator object. In some embodiments, an electronic device provides information associated with a remote locator object. In some embodiments, an electronic device displays notifications associated with a trackable device. In some embodiments, a first device generates alerts.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: April 23, 2024
    Assignee: Apple Inc.
    Inventors: Frank De Jong, Nicole R. Ryan, Arian Behzadi, Corey Keiko Wang, Marcel Van Os, Craig M. Federighi
  • Patent number: 11966556
    Abstract: In some embodiments, an electronic device present user interfaces for initializing a remote locator object. In some embodiments, an electronic device presents notifications when a remote locator object is separated from the user. In some embodiments, an electronic device presents notifications when an unknown remote locator object is tracking the user. In some embodiments, an electronic device presents a user interface for a short distance locator user interface for finding a remote locator object. In some embodiments, an electronic device presents user interfaces for finding a remote locator object using a map user interface or using a short distance locator user interface.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: April 23, 2024
    Assignee: Apple Inc.
    Inventors: Arian Behzadi, Marcel Van Os, Nicole R. Ryan, Corey K. Wang, Frank De Jong, Patrick L. Coffman
  • Patent number: 11966866
    Abstract: A method and system for providing access to a resource. A request for an individual within an organization to access the resource is received. In response to the request having been received, at least one constraint for accessing the resource by the individual is ascertained, based on respective constraints for accessing the resource by one or more other individuals in the organization. The one or more other individuals have a same role in the organization as the individual or have a respective relationship with the individual. The at least one constraint is provided to the individual.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: April 23, 2024
    Assignee: KYNDRYL, INC.
    Inventors: Guo K. Fu, De Shou Kong, Hua Li, Rui Wang, Wen Jing Wang
  • Publication number: 20240126685
    Abstract: Methods, systems, and devices for dynamic voltage supply for memory circuit are described. An apparatus may adjust a supply voltage based on a process corner and a temperature of the memory system. An apparatus may include a memory array and a controller. The controller may determine a first temperature of the apparatus is less than a first temperature threshold at a first time. The controller may transition a voltage supplied to the controller from a first voltage level to a second voltage level based on determining the first temperature is less than the first temperature threshold. The controller may determine a second temperature is greater than a second temperature threshold at a second time. The controller may transition the voltage supplied to the controller from the second voltage level to the first voltage level based on determining the second temperature is greater than the second temperature threshold.
    Type: Application
    Filed: April 27, 2021
    Publication date: April 18, 2024
    Inventors: Hua Tan, Junjun Wang, De Hua Guo
  • Patent number: 11961893
    Abstract: Improved conductive contacts, methods for forming the same, and semiconductor devices including the same are disclosed. In an embodiment, a semiconductor device includes a first interlayer dielectric (ILD) layer over a transistor structure; a first contact extending through the first ILD layer, the first contact being electrically coupled with a first source/drain region of the transistor structure, a top surface of the first contact being convex, and the top surface of the first contact being disposed below a top surface of the first ILD layer; a second ILD layer over the first ILD layer and the first contact; and a second contact extending through the second ILD layer, the second contact being electrically coupled with the first contact.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20240119888
    Abstract: An electronic device includes a gamma data source, a signal receiving circuit, a buffer circuit, a counter, a multiplexer, and a gamma processing unit. The signal receiving circuit receives source data, and correspondingly generates a grayscale value. The buffer circuit electrically couples the signal receiving circuit and stores the grayscale value. The counter receives a system clock signal to generate a sequence number. The multiplexer electrically couples the counter and the gamma data source. The multiplexer receives the sequence number. The multiplexer outputs a bit message corresponding to the sequence number in the gamma data source. The gamma processing unit electrically couples the multiplexer and the buffer circuit. The gamma processing unit receives the bit message from the multiplexer. The gamma processing unit receives the grayscale value from the buffer circuit. The gamma processing unit outputs a bit value corresponding to the grayscale value in the bit message.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Hsin FENG, Chong-De WANG, Yung-Hsin CHANG
  • Patent number: 11932931
    Abstract: The present invention relates to a hydrophilic metal thin film, which is formed by stacking a plurality of columnar structures. A plurality of tetrahedral structures is on the surface of the hydrophilic metal film, which is formed on the top of the columnar structures. The width of the tetrahedral structures is 15 nm to 120 nm. The hydrophilic metal thin film comprises: 35 to 95 at % of iron, 5 to 20 at % of chromium. The above-mentioned hydrophilic metal thin film is formed by magnetron sputtering method under the working pressure of argon gas ranging from 6 mTorr to 13 mTorr, and the sputtering time exceeds 20 minutes.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: March 19, 2024
    Assignee: NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Pak-Man Yiu, Jhen-De You, Jinn Chu, Sung-Tsun Wang
  • Patent number: 11926049
    Abstract: A nuclear emergency multifunctional operation robot includes a base, a mechanical arm, a tool change-over device, and motion supporting devices. The base includes a pedestal, a mounting seat A, a mounting seat B, a mounting seat C, a rotation driving mechanism A, and a rotation driving mechanism B. The front end of the mechanical arm is connected to the mounting seat B; the tool change-over device includes a male connector and a female connector which are abutted with or separated from each other; and the motion supporting devices are used to drive the nuclear emergency multifunctional operation robot to move. The present disclosure has the advantages that the base can be integrated with various end tools, so that the operation robot conveniently changes over tools according to operation needs to conduct various types of operations.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: March 12, 2024
    Assignee: University of South China
    Inventors: Dewen Tang, Shuliang Zou, Wei Wang, Weiwei Xiao, De Zhang, Jun Liu, Qian Deng
  • Patent number: 11928117
    Abstract: Embodiments of the present invention relate to methods, systems, and computer program products for managing a plurality of live comments. A plurality of live comments is obtained for a video, the plurality of live comments being associated with a plurality of fragments in the video, respectively. A plurality of features are extracted from the plurality of live comments, respectively. A knowledge base is generated for the plurality of live comments based on the plurality of features. With these embodiments, the live comments may be managed in an effective way. Further, the knowledge base may provide answers to a user query.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: March 12, 2024
    Assignee: International Business Machines Corporation
    Inventors: Wen Wang, Yi Chen Zhong, Kun Yan Yin, De Shuo Kong, Lu Yu, Yi Ming Wang
  • Patent number: 11929488
    Abstract: The present invention relates to a hydrogen storage alloy, an electrode for a Ni-MH battery, a secondary battery, and a method for preparing the hydrogen storage alloy. The chemical composition of the hydrogen storage alloy is expressed by the general formula La(3.0˜3.2)xCexZrySm(1-(4.11˜4.2)x-y)NizCouMnvAlw, where x, y, z, u, v, w are molar ratios, and 0.14?x?0.17, 0.02?y?0.03, 4.60?z+u+v+w?5.33, 0.10?u?0.20, 0.25?v?0.30, and 0.30?w?0.40. The atomic ratio of the metal lanthanum (La) to the metal cerium (Ce) is fixed at 3.0 to 3.2, which satisfies the requirements of the overcharge performance of the electrode material. A side elements are largely substituted by samarium (Sm) element, that is, the atomic ratio of Sm on the A side is 25.6% to 42%, so as to solve the problem of shortened cycle life caused by the small amount of cobalt (Co) atoms.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: March 12, 2024
    Assignees: South China University of Technology, Sihui Dabowen Industrial Co., Ltd., Guangdong Research Institute of Rare-Metal
    Inventors: Liuzhang Ouyang, Cheng Tan, Min Zhu, De Min, Hui Wang, Tongzhao Luo, Fangming Xiao, Renheng Tang
  • Publication number: 20240079409
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. A first width direction of the first conductive contact structure is substantially parallel to a second width direction of the first conductive via structure.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyun-De WU, Te-Chih HSIUNG, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU, Peng WANG, Huan-Just LIN
  • Publication number: 20240081158
    Abstract: An RRAM structure includes a dielectric layer. A bottom electrode, a resistive switching layer and a top electrode are disposed from bottom to top on the dielectric layer. A spacer is disposed at sidewalls of the bottom electrode, the resistive switching layer and the top electrode. The spacer includes an L-shaped spacer and a sail-shaped spacer. The L-shaped spacer contacts the sidewall of the bottom electrode, the sidewall of the resistive switching layer and the sidewall of the top electrode. The sail-shaped spacer is disposed on the L-shaped spacer. A metal line is disposed on the top electrode and contacts the top electrode and the spacer.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei Cheng, ZHEN CHEN, Shen-De Wang
  • Publication number: 20240072115
    Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: February 13, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
  • Patent number: 11913492
    Abstract: A uni-directional and multi-directional mechanical bearing suitable for supporting structures such as bridges comprises a removable cassette comprising a sliding layer composed of a low friction material such as PTFE. The removable cassette allows for the replacement of the sliding layer without needing to remove or replace the entire bearing. The bearing can be part of a kit that includes a replacement cassette having a varying thickness that corresponds to the uneven wear on the sliding layer of the removable cassette and compensates for an eccentric pressure on the bearing when under load.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: February 27, 2024
    Assignee: MARCONMETALFAB INC.
    Inventors: Eric de Fleuriot de la Coliniere, Casey Xi Wang, Duncan Robert Bohlmann
  • Publication number: 20240057488
    Abstract: A RRAM (resistive random-access memory) device includes a bottom electrode line, a top electrode island and a resistive material. The bottom electrode line is directly on a first metal structure. The top electrode island is disposed beside the bottom electrode line. The resistive material is sandwiched by a sidewall of the bottom electrode line and a sidewall of the top electrode island. The present invention also provides a method of forming the RRAM device.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 15, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ching Hsu, Wang Xiang, Shen-De Wang
  • Patent number: 11901396
    Abstract: Provided is a method of fabricating an image sensor device. An exemplary includes forming a plurality of radiation-sensing regions in a substrate. The substrate has a front surface, a back surface, and a sidewall that extends from the front surface to the back surface. The exemplary method further includes forming an interconnect structure over the front surface of the substrate, removing a portion of the substrate to expose a metal interconnect layer of the interconnect structure, and forming a bonding pad on the interconnect structure in a manner so that the bonding pad is electrically coupled to the exposed metal interconnect layer and separated from the sidewall of the substrate.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Hsiao-Hui Tseng