Abstract: A method, apparatus and computer program product are provided for implementing time synchronization correction in computer systems. A service processor includes a battery-backed hardware clock, and a hypervisor includes a hypervisor system clock. A common timer resource is accessible by the hypervisor and the service processor. To synchronize the battery-backed hardware clock and the hypervisor system clock, the common timer resource is used to measure the latency in the communication medium between the hypervisor and the service processor. The latency is then added onto the time value received in time of day messages between the hypervisor and the service processor for time synchronization correction in the computer systems.

Abstract: An air handling system adapted especially for drop ceiling gridwork employs a shroud and a grille. The grille is made of a material meeting UL Standard 94 or 181 and rests on the drop ceiling gridwork. The shroud is made of a material meeting at least UL Standard 94HB, and at least its inner surface is non-reflective to hide the shroud structure when viewed through openings in the grille. The shroud interconnects the grille openings to an air handling duct above the gridwork using the appropriate fasteners.

Abstract: A method, apparatus, and computer instructions for managing a set of I/O subsystems. Previously stored I/O subsystem information is compared to current I/O subsystem information collected from the set of I/O subsystems. The I/O subsystem information includes addresses associated with unique identifiers. Information in the set of subsystems is recorrelated if a mismatch is present between the previously stored I/O subsystem information and the current I/O subsystem information in the set of subsystems.

Abstract: A method and apparatus for improving direct memory access and cache performance utilizing a special Input/Output or “I/O” page, defined as having a large size (e.g., 4 Kilobytes or 4 Kb), but with distinctive cache line characteristics. For Direct Memory Access (DMA) reads, the first cache line in the I/O page may be accessed, by a Peripheral Component Interconnect (PCI) Host Bridge, as a cacheable read and all other lines are non-cacheable access (DMA Read with no intent to cache). For DMA writes, the PCI Host Bridge accesses all cache lines as cacheable. The PCI Host Bridge maintains a cache snoop granularity of the I/O page size for data, which means that if the Host Bridge detects a store (invalidate) type system bus operation on any cache line within an I/O page, cached data within that page is invalidated, the Level 1 and Level 2 ((L1/L2) caches continue to treat all cache lines in this page as cacheable).

Abstract: A high purity dielectric ceramic composition is disclosed. This composition provides improved electrical properties in the form of ultra-high electrical Q, a low (T.sub.f) property and a high dielectric constant (K). This composition is also amenable to large scale manufacturing processes and operations. The composition provides a multi-oxide dielectric with BaO--Nd.sub.2 O--Sm.sub.2 O.sub.3 --TiO.sub.2 --La.sub.2 O.sub.3 Bi.sub.2 O.sub.3 and ZnO as constituents. The composition materials effectively provide these desirable properties in a custom composition of various oxide materials advantageously including samarium oxide (Sm.sub.2 O.sub.3).

Abstract: A chemical compound of the following formula is disclosed: ##STR1## where R is selected from the group consisting of H, trityl, 4-O-monomethoxytrityl, 4,4'-O-dimethoxytrityl, and acyl groups, and whereby R can be used as a protecting group or is an H;R' is a phosphoramidite;R" is selected from the group consisting of H and lower alkyl groups;R'" is selected from the group consisting of H and lower alkyl groups;R.sup.4 is selected from the group consisting of H, lower alkyl, acyl, ##STR2## and (CH.sub.2).sub.p COO(CH.sub.2).sub.q CH.sub.3 wherein p is an integer from 0 to 4 and q is an integer from 0 to 4;R.sup.5 is selected from the group consisting of H, lower alkyl, acyl, ##STR3## and (CH.sub.2).sub.p COO(CH.sub.2).sub.q CH.sub.3 wherein p is an integer from 0 to 4 and q is an integer from 0 to 4;n is an integer from 0 to 10;m is an integer from 0 to 10;r is 1, 2, or 3; andX.sup.- is a negative ion.

Abstract: A high-frequency dielectric ceramic compound having a perovskite-type crystal structure comprising a chemical composition substantially represented by the formula (Sr.sub.x Ca.sub.y Mn.sub.z)TiO.sub.3 in which 0.98<x+y+z<1.02, 0.34<y<0.4, and 0.0075<z<0.0015, and possessing a non-linear temperature coefficient is set forth. A method is presented for utilizing the compound to formulate a high-frequency dielectric material, the formulated material being particularly suitable for providing filters and related applications with a relatively low resonant frequency temperature coefficient.

Abstract: A high-frequency dielectric ceramic compound having a perovskite-type crystal structure comprising a chemical composition substantially represented by the formula (Sr.sub.x Ca.sub.y Mn.sub.z)TiO.sub.3 in which 0.98<x+y+z<1.02,0.34<y<0.4, and 0.0075<z<0.015, and possessing a non-linear temperature coefficient is set forth. A method is presented for utilizing the compound to formulate a high-frequency dielectric material, the formulated material being particularly suitable for providing filters and related applications with a relatively low resonant frequency temperature coefficient.

Abstract: A dot printer is presented having an arrangement of dot emitters which is suitable for producing various line widths in a vector graphics mode as well as producing lines and characters of various sizes in a raster scan mode. The printer has emitters arranged in a pattern having one emitter in each row and in each column of the pattern. The pattern is formed from primitive dot patterns which can be utilized in the vector graphics mode to produce vectors of various line widths. The generation of dots is controlled to produce rounded terminations of line segments.