Patents by Inventor Dean S. Chung

Dean S. Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7678258
    Abstract: An improved method of stabilizing wet chemical baths is disclosed. Typically such baths are used in processes for treating workpieces, for example, plating processes for plating metal onto substrates. In particular, the present invention relates to copper plating baths. More particularly, the present invention relates to the stability of copper plating baths. More particularly, the present invention relates to prevention of void formation by monitoring the accumulation of deleterious by-products in copper plating baths.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: March 16, 2010
    Assignee: International Business Machines Corporation
    Inventors: Panayotis Andricacos, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Keith T. Kwietniak, Peter S. Locke, Darryl D. Restaino, Soon-Cheon Seo, Philippe M. Vereecken, Erick G. Walton
  • Patent number: 7227265
    Abstract: Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 ?m and via openings filled with electroplated copper than is substantially free of internal seams or voids.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: June 5, 2007
    Assignee: International Business Machines Corporation
    Inventors: Panayotis C. Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Wilma Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Christopher C. Parks, Soon-Cheon Seo, Andrew H. Simon, Erick G. Walton
  • Publication number: 20040178077
    Abstract: Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 &mgr;m and via openings filled with electroplated copper than is substantially free of internal seams or voids.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 16, 2004
    Applicant: International Business Machines Corporation
    Inventors: Panayotis C. Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Wilma Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Christopher C. Parks, Soon-Cheon Seo, Andrew H. Simon, Erick G. Walton
  • Publication number: 20040178078
    Abstract: Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 &mgr;m and via openings filled with electroplated copper than is substantially free of internal seams or voids.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 16, 2004
    Applicant: International Business Machines Corporation
    Inventors: Panayotis C. Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Wilma Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Christopher C. Parks, Soon-Cheon Seo, Andrew H. Simon, Erick G. Walton
  • Patent number: 6605534
    Abstract: The present invention provides a method of selectively inhibiting the deposition of a conductive material within desired regions of a semiconductor device. A seed layer is rendered ineffective to the electroplating in select regions of the substrate, by either the removal or the poisoning of the seed layer in select regions.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: August 12, 2003
    Assignee: International Business Machines Corporation
    Inventors: Dean S. Chung, David V. Horak, Erick G. Walton
  • Patent number: 6409903
    Abstract: A method and apparatus are provided for the electroplating of a substrate such as a semiconductor wafer which provides a uniform electroplated surface and minimizes bum-through of a seed layer used on the substrate to initiate electroplating. The method and apparatus of the invention uses a specially defined multistep electroplating process wherein, in one aspect, a voltage below a predetermined threshold voltage is applied to the anode and cathode for a first time period followed by applying a current to the anode and cathode for a second time period the current producing a voltage below the predetermined threshold voltage. In another aspect of the invention, a current is applied to the anode and cathode substrate which current is preprogrammed to ramp up to a current value from a first current value which current produces a voltage below a predetermined threshold voltage.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: June 25, 2002
    Assignee: International Business Machines Corporation
    Inventors: Dean S. Chung, Josef W. Korejwa, Erick G. Walton
  • Patent number: 6270646
    Abstract: A metal plating apparatus is described which includes a compressible member having a conductive surface covering substantially all of the surface of the substrate to be plated. The plating current is thereby transmitted over a wide area of the substrate, rather than a few localized contact points. The compressible member is porous so as to absorb the plating solution and transmit the plating solution to the substrate. The wafer and compressible member may rotate with respect to each other. The compressible member may be at cathode potential or may be a passive circuit element.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: August 7, 2001
    Assignee: International Business Machines Corporation
    Inventors: Erick Gregory Walton, Dean S. Chung, Lara Sandra Collins, William E. Corbin, Jr., Hariklia Deligianni, Daniel Charles Edelstein, James E. Fluegel, Josef Warren Korejwa, Peter S. Locke, Cyprian Emeka Uzoh