Patents by Inventor Deepak Keshav Pai

Deepak Keshav Pai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9318350
    Abstract: An embodiment of the invention generally relates to a method of converting a commercial off-the-shelf electrical lead to a rugged off-the-shelf electrical lead by laser machining a portion of the electrical lead. The method includes ablating material from the electrical lead of the commercial off-the-shelf component to reduce the moment of inertia or increase the flexibility of the electrical lead.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: April 19, 2016
    Assignee: General Dynamics Advanced Information Systems, Inc.
    Inventors: Deepak Keshav Pai, Melvin Eric Graf
  • Patent number: 8726498
    Abstract: The invention comprises methods for filling holes in printed wiring boards and printed wiring boards produced by these methods. The methods involve plating metal conductors inside the holes of the printed wiring boards while protecting the conducting surfaces of the printed wiring boards from being plated using photoresist film. The side surfaces of a printed wiring board are covered with photoresist. The photoresist is exposed to developing light, except the photoresist covering the holes on one side of the board is masked to prevent exposure of the holes to the developing light. The undeveloped photoresist covering the holes is removed. The board is subjected to a plating process, which deposits conductive materials in the holes, but the photoresist on the conducting surfaces of the board prevents conductive materials to be plated on the surfaces of the board.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: May 20, 2014
    Assignee: General Dynamics Advanced Information Systems
    Inventors: Deepak Keshav Pai, Chris H. Simon
  • Publication number: 20140131307
    Abstract: An embodiment of the invention generally relates to a method of converting a commercial off-the-shelf electrical lead to a rugged off-the-shelf electrical lead by laser machining a portion of the electrical lead. The method includes ablating material from the electrical lead of the commercial off-the-shelf component to reduce the moment of inertia or increase the flexibility of the electrical lead.
    Type: Application
    Filed: July 8, 2013
    Publication date: May 15, 2014
    Inventors: Deepak Keshav Pai, Melvin Eric Graf
  • Publication number: 20110067235
    Abstract: The invention comprises methods for filling holes in printed wiring boards and printed wiring boards produced by these methods. The methods involve plating metal conductors inside the holes of the printed wiring boards while protecting the conducting surfaces of the printed wiring boards from being plated using photoresist film. The side surfaces of a printed wiring board are covered with photoresist. The photoresist is exposed to developing light, except the photoresist covering the holes on one side of the board is masked to prevent exposure of the holes to the developing light. The undeveloped photoresist covering the holes is removed. The board is subjected to a plating process, which deposits conductive materials in the holes, but the photoresist on the conducting surfaces of the board prevents conductive materials to be plated on the surfaces of the board.
    Type: Application
    Filed: August 18, 2010
    Publication date: March 24, 2011
    Applicant: General Dynamics Advanced Information Systems, Inc
    Inventors: Deepak Keshav Pai, Chris H. Simon
  • Patent number: 7802360
    Abstract: The invention comprises methods for filling holes in printed wiring boards and printed wiring boards produced by these methods. The methods involve plating metal conductors inside the holes of the printed wiring boards while protecting the conducting surfaces of the printed wiring boards from being plated using photoresist film. The side surfaces of a printed wiring board are covered with photoresist. The photoresist is exposed to developing light, except the photoresist covering the holes on one side of the board is masked to prevent exposure of the holes to the developing light. The undeveloped photoresist covering the holes is removed. The board is subjected to a plating process, which deposits conductive materials in the holes, but the photoresist on the conducting surfaces of the board prevents conductive materials to be plated on the surfaces of the board.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: September 28, 2010
    Assignee: General Dynamics Advanced Information Systems, Inc.
    Inventors: Deepak Keshav Pai, Chris H. Simon
  • Patent number: 5953816
    Abstract: An interposer is formed by forming a laminate comprising a first sheet of electrically insulating material and a second sheet of conductive material. The first sheet has a first plurality of apertures therethrough and the second sheet is laminated to the first sheet to close the first plurality of apertures. Material is removed from the second sheet around the first plurality of apertures to form conductive pads, the pads closing the first plurality of apertures. A third sheet of electrically insulating material is attached to the second sheet. The third sheet has a second plurality of apertures therethrough, the third sheet being positioned relative to the second sheet such that the apertures of the second plurality are closed by the conductive pads. In a preferred form, the third sheet is positioned relative to the first sheet so that the apertures of the second plurality are not in registration with the apertures of the first plurality.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: September 21, 1999
    Assignee: General Dynamics Information Systems, Inc.
    Inventors: Deepak Keshav Pai, Leo Marvin Rosenstein, Lowell Dennis Lund
  • Patent number: 5871868
    Abstract: The present invention is an apparatus and method for machining a laminate structure to form a selected shape. The method includes forming a first layer on a substrate. A first protective structure is defined that is attached to each of the first layer and the substrate. At least a portion of the protective structure has the selected shape. The laminate structure is then machined along the first protective structure thereby forming at least a portion of the selected shape.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: February 16, 1999
    Assignee: General Dynamics Information Systems, Inc.
    Inventor: Deepak Keshav Pai
  • Patent number: 5746367
    Abstract: A system for removing solder from an area grid array pad by applying a wire mesh to a conductive surface of the area grid array that is covered with solder. Heat is applied to the wire mesh and the conductive surface of the area grid array so that the solder flows from the conductive surface onto the wire mesh. The wire mesh is removed from the conductive surface thereby removing all solder from the conductive surface of the area grid array.
    Type: Grant
    Filed: April 8, 1996
    Date of Patent: May 5, 1998
    Assignee: Ceridan Corporation
    Inventors: Deepak Keshav Pai, Lowell Dennis Lund
  • Patent number: 5740954
    Abstract: A system is provided for selectively attaching or detaching a land grid array component to a surface of circuit board where the attachment is a grid array of solid conductive solder beads or balls. A chamber contains an inert liquid, and a heater heats the inert liquid to a temperature above the melting temperature of the solder beads. A fluid level adjustment means adjusts the level of the inert liquid in the chamber between a first level below the component and a second level above the component. A first mounting means supports the circuit board above the component, and a second mounting means is positioned at least partially in the container to support the component below the circuit board and to bias the component against the circuit board. An component/board assembly is positioned in the system. The beads are uniformly melted by raising the level of the inert liquid in the chamber to above the component to permit removal of the board.
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: April 21, 1998
    Assignee: General Dynamics Information Systems, Inc.
    Inventors: Deepak Keshav Pai, Allen Lee Bringewatt