Patents by Inventor Deepak Sridhara
Deepak Sridhara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10441162Abstract: An ophthalmic examination suite including a base support having a base plate, a carriage movable on the base plate, the carriage being laterally movable between a first position and a second position relative to an instrument delivery stand, and a chair coupled to the carriage, the chair being configured to receive a seated patient thereon.Type: GrantFiled: July 18, 2016Date of Patent: October 15, 2019Assignee: RELIANCE MEDICAL PRODUCTS, INC.Inventors: Gary G. Schwaegerle, Michael A. Carvajal, Deepak Sridhara
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Patent number: 10437674Abstract: Systems and methods are disclosed for employing variable amounts of parity sectors. In certain embodiments, an apparatus may comprise a processor configured to generate a first number of parity sectors for write data to be written to a nonvolatile memory, and store the write data and a second number of parity sectors to the nonvolatile memory, the second number of parity sectors being a subset less than all of the first number of parity sectors. The processor may further select additional parity sectors from the first number of parity sectors based on error metrics for the write data, store the additional parity sectors to the nonvolatile memory, and perform error recovery on the write data based on the additional parity sectors.Type: GrantFiled: June 1, 2017Date of Patent: October 8, 2019Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ara Patapoutian
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Patent number: 10382065Abstract: An apparatus may include a circuit that initializes a read operation to read one or more requested data segments of a respective data unit. The circuit may generate equalized combined samples for a failed data segment of the one or more requested data segments based on first samples and second samples. In addition, the circuit may perform iterative outer code recovery for the data unit utilizing the equalized combined samples as samples for the failed data segment.Type: GrantFiled: November 7, 2016Date of Patent: August 13, 2019Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ara Patapoutian, Prafulla B Reddy, Jason Charles Jury, Richard Jay Parshall
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Patent number: 10379972Abstract: Systems and methods are disclosed for minimizing reads for reallocated sectors of a data storage medium. An apparatus may be configured to selectively skip over reallocated sectors in an LBA range without interrupting a read, via generating a skip mask or by beginning the read after the reallocated sector and reading the entire track up to the reallocated sector. When a number of sectors not read from the LBA range during the read operation is less than an amount of sectors that can be recovered based on an error correction capability, the data of the reallocated sector may be reconstructed using error correction data rather than by performing a read at the reallocated sector.Type: GrantFiled: November 2, 2016Date of Patent: August 13, 2019Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ara Patapoutian, Prafulla B Reddy
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Patent number: 10177791Abstract: An apparatus may include a circuit that performs one or more read and recovery operations for one or more data segments including updating an outer code syndrome for one or more recovered data segments recovered by the one or more read and recovery operations and preventing updates of the outer code syndrome for one or more failed data segments not recovered by the one or more read and recovery operations.Type: GrantFiled: November 8, 2016Date of Patent: January 8, 2019Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ara Patapoutian
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Patent number: 10140180Abstract: Systems and methods are disclosed for performing segment-based outer code recovery at a data storage device. An apparatus may comprise a circuit configured to disable outer code error recovery, and perform a read operation spanning a plurality of segments of a data storage medium, a segment including a plurality of sectors. The circuit may identify one or more segments from the plurality of segments that have one or more sectors with an error. For an identified segment of the one or more segments, the circuit may perform a re-read operation with outer code error recovery enabled, and perform outer code recovery on sectors with an error within the identified segment.Type: GrantFiled: November 4, 2016Date of Patent: November 27, 2018Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ara Patapoutian, Prafulla B Reddy
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Patent number: 9837115Abstract: Systems and methods are disclosed for implementing unequal error correction code (ECC) in multi-track recording. A device may comprise a circuit configured to implement an error correction coding scheme applying different code rate error correction codes on adjacent tracks within a same recording zone. The circuit may perform a read operation, including simultaneously detecting bits from a first track and a second track of the adjacent tracks, iteratively applying detected bits from the first track to perform adjacent track interference cancellation (ATIC) to decode bits from the second track, and iteratively applying detected bits from the second track to perform ATIC to decode bits from the first track.Type: GrantFiled: October 31, 2016Date of Patent: December 5, 2017Assignee: Seagate Technology LLCInventors: Deepak Sridhara, William M Radich
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Patent number: 9654145Abstract: A storage device disclosed herein includes a memory and a write channel configured to interleave a plurality of code-words to generate a plurality of multiplet sequences such that at least two of the plurality of code-words interleave to the end of the interleaving process. In one example implementation, for each of the multiplet sequences no two successive multiplets are from the same code-word, a multiplet including a plurality of bits from a single code-word.Type: GrantFiled: November 24, 2014Date of Patent: May 16, 2017Assignee: SEAGATE TECHNOLOGY LLCInventors: Belkacem Derras, Deepak Sridhara, Richard Parshall
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Publication number: 20160324415Abstract: An ophthalmic examination suite including a base support having a base plate, a carriage movable on the base plate, the carriage being laterally movable between a first position and a second position relative to an instrument delivery stand, and a chair coupled to the carriage, the chair being configured to receive a seated patient thereon.Type: ApplicationFiled: July 18, 2016Publication date: November 10, 2016Inventors: Gary G. Schwaegerle, Michael A. Carvajal, Deepak Sridhara
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Patent number: 9396062Abstract: A multi-dimensional recording (MDR) system may include a group based coding circuit (GBCC) which can implement error correcting codes via outer codes. The GBCC can implement outer codes, including interleaving outer codes, in MDR systems where inner codewords include multiple memory groupings. The multiple memory groupings may be across different structural divisions within a data storage medium; or could be across multiple different data storage mediums.Type: GrantFiled: April 4, 2014Date of Patent: July 19, 2016Assignee: SEAGATE TECHNOLOGY LLCInventors: Deepak Sridhara, William Radich, Ara Patapoutian, Timothy R Feldman, Mark Gaertner
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Patent number: 9392937Abstract: An ophthalmic examination suite includes an instrument delivery stand, a base coupled with the instrument delivery stand and including a base plate, a carriage moveable on the base plate, and a chair supported by the carriage and configured to receive a seated patient thereon. The chair is laterally moveable with the carriage between an examination position and a stowed position. A space is created next to the chair when the chair is in the stowed position, and the space is configured to receive a wheelchair during an eye examination.Type: GrantFiled: October 19, 2012Date of Patent: July 19, 2016Assignee: Reliance Medical Products, Inc.Inventors: Gary G. Schwaegerle, Michael A. Carvajal, Deepak Sridhara
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Patent number: 9362954Abstract: Encoding and decoding schemes are presented with various configurations for error correcting code (ECC) encoders and decoders. Bits from encoders can be interleaved before they are transmitted to the communications medium. During receiving, or read back, stronger, converged ECC decoders can help with weaker decoders through detector iterations. Variations of iterative detector-decoders are described.Type: GrantFiled: September 13, 2013Date of Patent: June 7, 2016Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ara Patapoutian
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Patent number: 9312886Abstract: A storage device is configured to utilize different encoding and decoding schemes in reading and writing data to different regions of a storage device based on the position of the storage regions and/or component-specific physical characteristics of the regions. Each encoding scheme may include multiple different types of encoders selected based an optimization process for each region.Type: GrantFiled: September 20, 2013Date of Patent: April 12, 2016Assignee: SEAGATE TECHNOLOGY LLCInventors: Ara Patapoutian, Deepak Sridhara, Zheng Wang, Jason Charles Jury
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Publication number: 20150089317Abstract: A storage device is configured to utilize different encoding and decoding schemes in reading and writing data to different regions of a storage device based on the position of the storage regions and/or component-specific physical characteristics of the regions. Each encoding scheme may include multiple different types of encoders selected based an optimization process for each region.Type: ApplicationFiled: September 20, 2013Publication date: March 26, 2015Applicant: Seagate Technology LLCInventors: Ara Patapoutian, Deepak Sridhara, Zheng Wang, Jason Charles Jury
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Patent number: 8943384Abstract: A method for re-using a soft decoder involves receiving soft data and hard data from memory cells in a memory device, mapping the soft data to a first set of soft information, mapping the hard data to a second set of soft information, and using the soft decoder to decode both the first set and second set of soft information.Type: GrantFiled: April 12, 2012Date of Patent: January 27, 2015Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Arvind Sridharan, Ara Patapoutian
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Patent number: 8885277Abstract: Technologies are described herein for implementing modulation coding schemes for TDMR. A data sequence is received to be stored on a first data track of a recording media. The first data sequence is encoded into a first codeword sequence using a modulation coding scheme, and the first codeword sequence is written to the first data track of the recording media. Subsequently, a second data sequence is received to be stored on a second data track of the recording media, the second data track being adjacent to the first data track. A second codeword sequence is generated for the second data sequence based on the first codeword sequence on the first data track, and the second codeword sequence is written to the second data track of the recording media.Type: GrantFiled: December 30, 2013Date of Patent: November 11, 2014Assignee: Seagate Technology LLCInventors: Fatih Erden, Barmeshwar Vikramaditya, Deepak Sridhara, William Radich
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Publication number: 20130275829Abstract: A method for re-using a soft decoder involves receiving soft data and hard data from memory cells in a memory device, mapping the soft data to a first set of soft information, mapping the hard data to a second set of soft information, and using the soft decoder to decode both the first set and second set of soft information.Type: ApplicationFiled: April 12, 2012Publication date: October 17, 2013Applicant: SEAGATE TECHNOLOGY LLCInventors: Deepak Sridhara, Arvind Sridharan, Ara Patapoutian
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Patent number: 8406051Abstract: Methods and systems for accessing encoded data stored in a solid state non-volatile memory device include iteratively demodulating and decoding the data. The memory device includes memory cells arranged to store multiple bits of data per memory cell. The memory cells are capable of storing multiple pages of data. Each bit stored in a memory cell is associated with a page of data that is different from other pages associated with other bits stored in the memory cell. The multiple pages are demodulated responsive to sensed voltage levels of the memory cells, and a demodulated output is provided for each page of the multiple pages. A decoded output for each page of the multiple pages is generated. Decoding the page and demodulating the multiple pages proceeds iteratively, including an exchange of information between the decoder and the demodulator.Type: GrantFiled: May 17, 2010Date of Patent: March 26, 2013Assignee: Seagate Technology LLCInventors: Ara Patapoutian, Deepak Sridhara, Bruce D. Buch
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Patent number: 8254167Abstract: Multiple logical pages are jointly encoded into a single code word and are stored in the same physical page of a solid state non-volatile memory (NVM) device having multi-level memory cells. A first logical page of the multiple logical pages is stored in the memory device as first bits of the multi-level memory cells while a second logical page of the multiple logical pages is temporarily cached. After the first logical page is stored as the first bits of the memory cell, the second logical page is stored as second bits of the memory cells.Type: GrantFiled: May 17, 2010Date of Patent: August 28, 2012Assignee: Seagate Technologies LLCInventors: Ara Patapoutian, Deepak Sridhara, Bruce D. Buch
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Patent number: 8130459Abstract: A method includes writing data to a bit-patterned media at times determined by a clock having a period that is offset from a bit island period by a fixed offset to create one insertion or one deletion approximately within a predetermined number of bit islands, reading the data, and correcting the read data using error correction. An apparatus that implements the method is also provided.Type: GrantFiled: January 4, 2011Date of Patent: March 6, 2012Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ching He, Arvind Sridharan, Raman Venkataranmani