Abstract: A switching regulator having fast start-up time and low standby power is disclosed. In an exemplary embodiment, an apparatus includes a transistor that generates a charging current at a first current level from a base current received at a base terminal. The apparatus also includes a capacitor that charges in response to the charging current at the first current level to generate a voltage signal that increases at a first rate. The apparatus also includes a charge pump having an output coupled to the base terminal. The charge pump outputs a charge pump current when the voltage signal exceeds a first voltage level. The base current is increased by charge pump current to cause the transistor to generate the charging current at a second current level, and the capacitor charges in response to the charging current at the second current level to generate the voltage signal that increases at a second rate.

Abstract: A switching regulator having fast start-up time and low standby power is disclosed. In an exemplary embodiment, an apparatus includes a transistor that generates a charging current at a first current level from a base current received at a base terminal. The apparatus also includes a capacitor that charges in response to the charging current at the first current level to generate a voltage signal that increases at a first rate. The apparatus also includes a charge pump having an output coupled to the base terminal. The charge pump outputs a charge pump current when the voltage signal exceeds a first voltage level. The base current is increased by charge pump current to cause the transistor to generate the charging current at a second current level, and the capacitor charges in response to the charging current at the second current level to generate the voltage signal that increases at a second rate.

Abstract: A power supply system includes an Offline Total Power Management Integrated Circuit (OTPMIC). The OTPMIC controls a Power Factor Correction (PFC) converter, a main AC/DC converter, and a standby AC/DC converter. A PFC Autodetect circuit in the OTPMIC monitors current flow in the PFC converter. If a high power condition is detected, then the PFC Autodetect circuit enables the PFC converter. The high power condition may be a voltage drop across a current sense resistor of a predetermined voltage for a predetermined time, within one half period of the incoming AC supply voltage. If a low power condition is detected, then the PFC Autodetect circuit disables the PFC converter. The PFC Autodetect circuit stores an IMON value that determines the predetermined voltage, and a TMON value that determines the predetermined time. The IMON and TMON values are loaded into the Autodetect circuit across an optocoupler link of the standby converter.

Abstract: A power supply system includes an Offline Total Power Management Integrated Circuit (OTPMIC). The OTPMIC controls a Power Factor Correction (PFC) converter, a main AC/DC converter, and a standby AC/DC converter. A PFC Autodetect circuit in the OTPMIC monitors current flow in the PFC converter. If a high power condition is detected, then the PFC Autodetect circuit enables the PFC converter. The high power condition may be a voltage drop across a current sense resistor of a predetermined voltage for a predetermined time, within one half period of the incoming AC supply voltage. If a low power condition is detected, then the PFC Autodetect circuit disables the PFC converter. The PFC Autodetect circuit stores an IMON value that determines the predetermined voltage, and a TMON value that determines the predetermined time. The IMON and TMON values are loaded into the Autodetect circuit across an optocoupler link of the standby converter.

Abstract: A circuit to protect data on an FRAM during a read operation includes an FRAM voltage regulator having an output to supply an FRAM operating voltage to the FRAM. A voltage monitor monitors a supply voltage for the FRAM to generate a voltage fault signal if the supply voltage falls below a predetermined value. And a circuit responsive to the voltage fault signal maintains the FRAM operating voltage above a voltage required to assure data integrity of the FRAM for a sufficient time required to perform an FRAM read operation.

Abstract: A circuit to protect data on an FRAM during a read operation includes an FRAM voltage regulator having an output to supply an FRAM operating voltage to the FRAM. A voltage monitor monitors a supply voltage for the FRAM to generate a voltage fault signal if the supply voltage falls below a predetermined value. And a circuit responsive to the voltage fault signal maintains the FRAM operating voltage above a voltage required to assure data integrity of the FRAM for a sufficient time required to perform an FRAM read operation.

Abstract: Automatically configurable dual regulator type circuits and methods are provided. On embodiment of the invention includes an automatically configurable dual regulator type circuit. The circuit comprises a high-side switching device (HS-SD) coupled to a low-side switching device (LS-SD) at an output node. The circuit further comprises a control logic device that turns on the HS-SD to provide an output current to a user selected circuit configuration through the output node, turns off the HS-SD after a voltage fed back from an output terminal of the user selected circuit configuration exceeds a first threshold and sets a regulator type configuration mode based on the presence or absence of a flyback period at the output node after the HS-SD has been turned off.

Abstract: An integrated circuit with a configurable portion, such as an input/output port, that can be placed in a default configuration prior to actual configuration of the integrated circuit. An external terminal that serves as an output during normal operation is coupled, after power-on of the integrated circuit, to a comparator that senses the voltage level at that external terminal. If the external terminal is at a particular level, a multiplexer is controlled to ignore the state of the normal configuration memory, and to place the configurable input/output port into a default protocol.

Abstract: A power regulator system is described. The system includes a switching system comprising at least one switch and an inductor, the switching system being configured to provide an output voltage based on a current through the inductor. The system also includes a switch driver configured to provide a switching signal to the switching system to control the operation of the at least one switch to provide the current through the at least one inductor. A mode controller is configured to switch the switch driver between a continuous mode of operation and a discontinuous mode of operation based on both a feedback voltage associated with the output voltage and at least one other predetermined operating condition associated with each of the continuous and discontinuous modes of operation.

Abstract: An integrated circuit with a configurable portion, such as an input/output port, that can be placed in a default configuration prior to actual configuration of the integrated circuit. An external terminal that serves as an output during normal operation is coupled, after power-on of the integrated circuit, to a comparator that senses the voltage level at that external terminal. If the external terminal is at a particular level, a multiplexer is controlled to ignore the state of the normal configuration memory, and to place the configurable input/output port into a default protocol.

Abstract: A disk drive controller including a differential voice coil motor control function is disclosed. The differential voice coil motor control function includes an on-chip compensation network for the inner control loop, including a resistor formed of one or more MOS transistors connected in series. The gate of the MOS transistors in the compensation network is driven with a bias voltage based on a tuning current, where the tuning current is derived so that it varies with process and temperature variations of the integrated circuit, for example with variations in an on-chip capacitor. The on-chip compensation network can be tuned with sufficient precision to properly compensate the inner control loop to provide the desired frequency response in driving the voice coil motor in the disk drive.

Abstract: Automatically configurable dual regulator type circuits and methods are provided. On embodiment of the invention includes an automatically configurable dual regulator type circuit. The circuit comprises a high-side switching device (HS-SD) coupled to a low-side switching device (LS-SD) at an output node. The circuit further comprises a control logic device that turns on the HS-SD to provide an output current to a user selected circuit configuration through the output node, turns off the HS-SD after a voltage fed back from an output terminal of the user selected circuit configuration exceeds a first threshold and sets a regulator type configuration mode based on the presence or absence of a flyback period at the output node after the HS-SD has been turned off.

Abstract: One embodiment of the invention includes a power regulator system. The system includes a switching system comprising at least one switch and an inductor, the switching system being configured to provide an output voltage based on a current through the inductor. The system also includes a switch driver configured to provide a switching signal to the switching system to control the operation of the at least one switch to provide the current through the at least one inductor. A mode controller is configured to switch the switch driver between a continuous mode of operation and a discontinuous mode of operation based on both a feedback voltage associated with the output voltage and at least one other predetermined operating condition associated with each of the continuous and discontinuous modes of operation.

Abstract: A disk drive controller including a differential voice coil motor control function is disclosed. The differential voice coil motor control function includes an on-chip compensation network for the inner control loop, including a resistor formed of one or more MOS transistors connected in series. The gate of the MOS transistors in the compensation network is driven with a bias voltage based on a tuning current, where the tuning current is derived so that it varies with process and temperature variations of the integrated circuit, for example with variations in an on-chip capacitor. The on-chip compensation network can be tuned with sufficient precision to properly compensate the inner control loop to provide the desired frequency response in driving the voice coil motor in the disk drive.

Abstract: A disk drive controller including a differential voice coil motor control function is disclosed. The differential voice coil motor control function includes an on-chip compensation network for the inner control loop, including a resistor formed of one or more MOS transistors connected in series. The gate of the MOS transistors in the compensation network is driven with a bias voltage based on a tuning current, where the tuning current is derived so that it varies with process and temperature variations of the integrated circuit, for example with variations in an on-chip capacitor. The on-chip compensation network can be tuned with sufficient precision to properly compensate the inner control loop to provide the desired frequency response in driving the voice coil motor in the disk drive.

Abstract: A disk drive controller including a differential voice coil motor control function is disclosed. The differential voice coil motor control function includes an on-chip compensation network for the inner control loop, including a resistor formed of one or more MOS transistors connected in series. The gate of the MOS transistors in the compensation network is driven with a bias voltage based on a tuning current, where the tuning current is derived so that it varies with process and temperature variations of the integrated circuit, for example with variations in an on-chip capacitor. The on-chip compensation network can be tuned with sufficient precision to properly compensate the inner control loop to provide the desired frequency response in driving the voice coil motor in the disk drive.