Patents by Inventor Dejan S. Milojicic

Dejan S. Milojicic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180307623
    Abstract: Examples disclosed herein relate to a memory controller interpreting capabilities returning datasets. A Central Processing Unit (CPU) is adapted to translate a first virtual address from a first capability to a first physical address, wherein the first capability is sent by a client application. The CPU is further adapted to send the first physical address to a memory controller coupled to a memory fabric. The memory controller loads a second capability located in the first physical address from the memory fabric, interprets an address encoded within the second capability as a second physical address, and returns a dataset located in the second physical address from the memory fabric.
    Type: Application
    Filed: April 25, 2017
    Publication date: October 25, 2018
    Inventors: Moritz J. Hoffmann, Alexander Richardson, Dejan S. Milojicic
  • Publication number: 20180285003
    Abstract: An example computing system may include a plurality of processors, persistent memory that is shared by the plurality of processors, and a memory-side accelerator that is to control access to the memory. A requesting processor of the plurality of processors may simultaneously request locking of and access to a target data object of the persistent memory by sending a single lock-and-access message to the memory-side accelerator. The lock-and-access message may include a first memory capability pointing to the target data object, a second memory capability pointing to a lock object that controls locking of the target data object, and a specified access operation that is requested.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 4, 2018
    Inventors: Alexander Leslie Richardson, Moritz Josef Hoffmann, Dejan S. Milojicic
  • Patent number: 10067795
    Abstract: Examples relate to firmware-based provisioning of hardware resources. In some of the examples, firmware discovers and takes ownership of a hardware resource. At this stage, the firmware performs a test to verify the hardware resource. The firmware then assigns the hardware resource to an OS instance. At this stage, the firmware can suspend assigning further hardware resources to the OS instance in response to a satisfied notification from the OS instance.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: September 4, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dejan S Milojicic, Derek Schumacher, Zhikui Wang
  • Patent number: 10037230
    Abstract: Examples relate to managing data processing resources. In one example, a computing device may: determine, for each of a plurality of data processing jobs, that the job is independent or dependent; allocate data processing resources to an independent job processing pool or a dependent job processing pool based on an initial resource share value indicating how resources are to be allocated between job processing pools; determine a first policy for scheduling data to be processed by processing resources allocated to the independent job processing pool; determine a second policy for scheduling data to be processed by processing resources allocated to the dependent job processing pool; determine an initial parallelism value that specifies a number of concurrently processing jobs; and provide a processing device with instructions to process batches of data using the allocation of data processing resources, the first policy, the second policy, and the initial parallelism value.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: July 31, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Yuan Chen, Dejan S. Milojicic, Dazhao Cheng
  • Patent number: 10019258
    Abstract: Examples relate to providing hardware assisted software versioning for clustered applications. In one example, virtualized global memory is accessible to application servers that provide a clustered application, where the clustered application includes multiple versions of a common data structure. After one of the application servers stores an element that is compatible with one version of the common data structure, other versions of the common data structure are located in the virtualized global memory. The element is then invalidated in the other versions of the common data structure to prevent access and translated directly in the virtualized global memory to the other versions of the common data structure. At this stage, the element can be validated in the other versions of the common data structure for access.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: July 10, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Douglas L. Voigt, Donald E. Bollinger, Daniel Juergen Gmach, Dejan S. Milojicic
  • Publication number: 20180114011
    Abstract: Example implementations relate to encrypted capabilities stored in global memory. For example, in an implementation, a capability protection system may store an encrypted capability into global memory, where the encrypted capability is encrypted based on a condition. The capability protection system may receive, from a node in communication with the global memory, a request to access the encrypted capability stored in the global memory. The capability protection system may provide to the node a decrypted form of the encrypted capability upon satisfaction of the condition by the node.
    Type: Application
    Filed: October 20, 2016
    Publication date: April 26, 2018
    Inventors: Chris I. Dalton, Dejan S. Milojicic
  • Publication number: 20180063158
    Abstract: Example implementations relate to cryptographic evidence of persisted capabilities. In an example implementation, in response to a request to access a persisted capability stored in a globally shared memory, a system may decide whether to trust the persisted capability by verification of cryptographic evidence accompanying the persisted capability. The system may load the persisted capability upon a decision to trust the persisted capability based on successful verification.
    Type: Application
    Filed: August 31, 2016
    Publication date: March 1, 2018
    Inventors: Chris I. Dalton, Dejan S. Milojicic
  • Publication number: 20180060233
    Abstract: Examples described herein relate to caching in a system with multiple nodes sharing a globally addressable memory. The globally addressable memory includes multiple windows that each include multiple chunks. Each node of a set of the nodes includes a cache that is associated with one of the windows. One of the nodes includes write access to one of the chunks of the window. The other nodes include read access to the chunk. The node with write access further includes a copy of the chunk in its cache and modifies multiple lines of the chunk copy. After a first line of the chunk copy is modified, a notification is sent to the other nodes that the chunk should be marked dirty. After multiple lines are modified, an invalidation message is sent for each of the modified lines of the set of the nodes.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 1, 2018
    Inventors: Gabriel Parmer, Paolo Faraboschi, Dejan S. Milojicic
  • Publication number: 20180032373
    Abstract: Examples relate to managing data processing resources. In one example, a computing device may: determine, for each of a plurality of data processing jobs, that the job is independent or dependent; allocate data processing resources to an independent job processing pool or a dependent job processing pool based on an initial resource share value indicating how resources are to be allocated between job processing pools; determine a first policy for scheduling data to be processed by processing resources allocated to the independent job processing pool; determine a second policy for scheduling data to be processed by processing resources allocated to the dependent job processing pool; determine an initial parallelism value that specifies a number of concurrently processing jobs; and provide a processing device with instructions to process batches of data using the allocation of data processing resources, the first policy, the second policy, and the initial parallelism value.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 1, 2018
    Inventors: Yuan Chen, Dejan S. Milojicic, Dazhao Cheng
  • Publication number: 20180004430
    Abstract: One example of a system includes a plurality of clients, a master chunk coordinator, and a plurality of chunk servers. Each client submits requests to access chunks of objects. The master chunk coordinator maintains chunk information for each object. Each chunk server includes a chunk monitor to monitor client requests, maintain chunk statistics for each chunk based on the monitoring, and transmit the chunk statistics for each chunk to the master chunk coordinator. The master chunk coordinator instructs the chunk servers to re-chunk objects, replicate chunks, migrate chunks, and resize chunks based on the chunk statistics to meet specified parameters.
    Type: Application
    Filed: January 30, 2015
    Publication date: January 4, 2018
    Inventors: Alexander M. Merritt, Dejan S. Milojicic
  • Publication number: 20170371663
    Abstract: Example implementations relate to global capabilities transferrable across node boundaries. For example, in an implementation, a switch that routes traffic between a node and global memory may receive an instruction from the node. The switch may recognize that data referenced by the instruction is a global capability, and the switch may process that global capability accordingly.
    Type: Application
    Filed: June 24, 2016
    Publication date: December 28, 2017
    Inventors: Dejan S Milojicic, Paolo Faraboschi, Chris I Dalton
  • Publication number: 20170329526
    Abstract: Example implementations relate to an interoperable capability. For example, in an implementation, an interoperable capability is recognizable by a plurality of kernels of a system, and the interoperable capability references a local capability of respective kernels. Consistency among the local capabilities of the kernels and the interoperable capability is maintained, in response to operations invoked on the interoperable capability.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 16, 2017
    Inventors: Reto Achermann, Maurice Bailleu, Dejan S. Milojicic, Gabriel Parmer
  • Patent number: 9792182
    Abstract: A technique includes generating a checkpoint for an application that is executing on a plurality of nodes of a distributed computing system. Forming the checkpoint includes selectively regulating communication of data from the plurality of nodes to a storage subsystem based at least in part on a replication of the data among the nodes.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: October 17, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Sudarsun Kannan, Paolo Faraboschi, Moray McLaren, Dejan S. Milojicic, Robert Schreiber
  • Publication number: 20170262209
    Abstract: According to an example, memory-driven OOB management may include OOB management of a computing node of a plurality of computing nodes. The OOB management may be executed independent of an OS of the computing node. A memory fabric may be used to provide for shared access to a plurality of NVM nodes by the plurality of computing nodes.
    Type: Application
    Filed: January 30, 2015
    Publication date: September 14, 2017
    Inventors: Zhikui Wang, Andy Brown, Stephen B. Lyle, Dejan S. Milojicic, Chandrasekar Venkatraman
  • Publication number: 20170249189
    Abstract: Examples relate to firmware-based provisioning of hardware resources. In some of the examples, firmware discovers and takes ownership of a hardware resource. At this stage, the firmware performs a test to verify the hardware resource. The firmware then assigns the hardware resource to an OS instance. At this stage, the firmware can suspend assigning further hardware resources to the OS instance in response to a satisfied notification from the OS instance.
    Type: Application
    Filed: December 10, 2014
    Publication date: August 31, 2017
    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Dejan S MILOJICIC, Derek SCHUMACHER, Zhikui WANG
  • Publication number: 20170228555
    Abstract: Example implementations relate to non-volatile storage of management data. In example implementations, a system is disclosed, the system including a plurality of computing devices, a management device, and a non-volatile memory including a plurality of management spaces corresponding to the plurality of computing devices. In example implementations, at least one of the plurality of management spaces is to be accessible by the management device and by the corresponding computing device, be inaccessible by computing devices other than the corresponding computing device, and store management data associated with the corresponding computing device.
    Type: Application
    Filed: August 13, 2014
    Publication date: August 10, 2017
    Inventors: Dejan S. Milojicic, Chris I. Dalton, Zhikui Wang, Chandrasekar Venkatraman, Adrian Shaw
  • Publication number: 20170132000
    Abstract: Examples relate to providing hardware assisted software versioning for clustered applications. In one example, virtualized global memory is accessible to application servers that provide a clustered application, where the clustered application includes multiple versions of a common data structure. After one of the application servers stores an element that is compatible with one version of the common data structure, other versions of the common data structure are located in the virtualized global memory. The element is then invalidated in the other versions of the common data structure to prevent access and translated directly in the virtualized global memory to the other versions of the common data structure. At this stage, the element can be validated in the other versions of the common data structure for access.
    Type: Application
    Filed: April 29, 2014
    Publication date: May 11, 2017
    Inventors: Douglas L. Voigt, Donald E. Bollinger, Daniel Juergen Gmach, Dejan S. Milojicic
  • Publication number: 20170123812
    Abstract: A non-transitory storage device includes machine readable instructions that, when executed, cause a processing resource to perform various operations. One such operation, for example, is to receive a selection of a blueprint to be used for configuration purposes. Other operations may include automatically validating the selected blueprint and automatically configuring the computing device in accordance with the selected and validated blueprint. Various related apparatuses and method are provided as well.
    Type: Application
    Filed: April 25, 2014
    Publication date: May 4, 2017
    Applicant: Hewlett Packard Enterprise Developmentt LP
    Inventors: Douglas L. Voigt, Dejan S. Milojicic
  • Patent number: 9619430
    Abstract: A computing node includes an active Non-Volatile Random Access Memory (NVRAM) component which includes memory and a sub-processor component. The memory is to store data chunks received from a processor core, the data chunks comprising metadata indicating a type of post-processing to be performed on data within the data chunks. The sub-processor component is to perform post-processing of said data chunks based on said metadata.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: April 11, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Sudarsun Kannan, Dejan S. Milojicic, Vanish Talwar
  • Patent number: 9614728
    Abstract: Examples of the present disclosure include methods, devices, and/or systems. Identifying network communication patterns can include analyzing a distributed computer program of a network, estimating virtual network communication traffic based on the analysis, and mapping the virtual network communication traffic to a physical network link. Identifying network communications patterns can also include identifying the network communication pattern and categorizing the physical communication network link based on an estimated communication intensity of the mapped communication traffic and the network communication pattern. Identifying network communication patterns can further include optimizing an energy used by the network based on the categorization.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: April 4, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Paolo Faraboschi, Moray McLaren, Dejan S. Milojicic, Robert Schreiber