Abstract: An interconnection structure for IC package onto the external device is discussed. The IC package has a voltage regulator contained therein; and the external device has a load assembled thereupon. A plurality of connection devices with elasticity are attached to the IC package, so that when a perpendicular force is applied to the connection devices, the IC package is electrically coupled to the external device to provide power supply to the load with ease replacement.

Abstract: A multi-die package structure with an embedded die embedded in a substrate, and a flip chip die mounted above the substrate is discussed. The package is compact and low cost.

Abstract: A manufacturing process of a DMOS device in a drift region in a semiconductor substrate, having: forming a polysilicon layer above the drift region; forming a block layer above the polysilicon layer; etching both the block layer and the polysilicon layer, through a window of a first masking layer to expose a window to the drift region; implanting dopants through the window to the drift region to form a body region; forming blocking spacers to wrap side walls of the polysilicon layer; implanting dopants into the body region under a window shaped by the blocking spacers to form a body pickup region; etching away the blocking spacers; performing a masking step to form gates; forming ONO spacers to wrap side walls of the gates; and performing a masking step to form source regions and drain pickup regions.

Abstract: A method for fabricating a LDMOS device, including: forming a semiconductor substrate; forming a dielectric layer atop the semiconductor substrate and an electric conducting layer on the dielectric layer; forming a first photoresist layer on the electric conducting layer; patterning the first photoresist layer through a first mask to form a first opening; etching the electric conducting layer through the first opening; implanting dopants of a first doping type into the semiconductor substrate through the first opening to form a first body region adjacent to the surface of the semiconductor substrate, and a second body region located beneath the first body region; removing the first photoresist layer; etching the electric conducting layer using a second photoresist layer and a second mask.

Abstract: A method for fabricating a LDMOS device, including: forming a semiconductor substrate; forming a dielectric layer atop the semiconductor substrate and an electric conducting layer on the dielectric layer; forming a first photoresist layer on the electric conducting layer; patterning the first photoresist layer through a first mask to form a first opening; etching the electric conducting layer through the first opening; implanting dopants of a first doping type into the semiconductor substrate through the first opening to form a first body region adjacent to the surface of the semiconductor substrate, and a second body region located beneath the first body region; removing the first photoresist layer; etching the electric conducting layer using a second photoresist layer and a second mask.

Abstract: A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: etching a polysilicon layer above the well region through a window for a body region; and forming spacers at side walls of the polysilicon layer, to define positions of source regions in the well region.

Abstract: A method for fabricating a LDMOS device, including: forming a semiconductor substrate; forming a dielectric layer atop the semiconductor substrate and an electric conducting layer on the dielectric layer; forming a first photoresist layer on the electric conducting layer; patterning the first photoresist layer through a first mask to form a first opening; etching the electric conducting layer through the first opening; implanting dopants of a first doping type into the semiconductor substrate through the first opening to form a first body region adjacent to the surface of the semiconductor substrate, and a second body region located beneath the first body region; removing the first photoresist layer; etching the electric conducting layer using a second photoresist layer and a second mask.

Abstract: RESURF effect devices with both relatively deep trenches and relatively deep implants are described herein. Also, methods of fabricating such devices are described herein. A RESURF effect device may include alternating regions of first and second conductivity types where each of the second regions includes an implant region formed into a trench region of the second region.

Abstract: RESURF effect devices with both relatively deep trenches and relatively deep implants are described herein. Also, methods of fabricating such devices are described herein. A RESURF effect device may include alternating regions of first and second conductivity types where each of the second regions includes an implant region formed into a trench region of the second region.