Patents by Inventor Dening Wang

Dening Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240156397
    Abstract: Provided are sleep quality assessment methods, apparatuses, electronic devices, and storage medium, and relates to the field of artificial intelligence and deep learning technologies, and in particular to sleep quality assessment methods, apparatuses, electronic devices, and storage medium. The method includes: determining sleep data of a subject; obtaining sleep feature data based on a reference core sleep period of the subject and the sleep data; and evaluating sleep quality of the subject based on the sleep feature data. The method assesses the sleep quality of the subject based on the sleep feature data extracted based on the reference core sleep period of the subject and the sleep data of the subject, takes into account individual factors of the subject in extracting the sleep feature data, thus providing a more accurate assessment of the sleep quality of the subject.
    Type: Application
    Filed: January 22, 2024
    Publication date: May 16, 2024
    Inventors: Guokang Zhu, Yi Zhang, Dening Hao, Xiaowei Dai, Kongqiao Wang
  • Patent number: 10396289
    Abstract: The present invention provides a novel organic compound of General Formula 1, a material comprising the same for organic electroluminescence devices, and an organic electroluminescence device comprising the material. The organic compound of the present invention is useful in organic electroluminescence devices as a hole injection layer substance, a hole transport layer substance, an electron blocking layer substance, and an emission layer substance such as green and red phosphorescent host substance, and when used in the organic electroluminescence devices, can reduce the drive voltage, and increase the luminous efficiency, luminance, thermal stability, color purity and service life of the devices.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: August 27, 2019
    Assignee: NANJING TOPTO MATERIALS CO., LTD.
    Inventors: Jin Woo Kim, Chao Qian, Jun Xu, Dening Wang
  • Patent number: 10396290
    Abstract: The present invention provides a novel organic compound, a material comprising the same for organic electroluminescence devices, and an organic electroluminescence device comprising the material. The organic compound provided in the present invention is useful in organic electroluminescence devices as a hole injection layer material, a hole transport layer material, an electron blocking layer material, and an emission layer material such as green and red phosphorescent host material, and can reduce the drive voltage, and increase the luminous efficiency, luminance, thermal stability, color purity and service life of the devices.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: August 27, 2019
    Assignee: NANJING TOPTO MATERIALS CO., LTD.
    Inventors: Jin Woo Kim, Chao Qian, Jun Xu, Dening Wang
  • Patent number: 10214489
    Abstract: The present invention provides a spiro compound of General Formula 1, and use thereof in the fields of electronic materials, fine chemistry, and medical science. Further, the present invention also provides an organic electroluminescence device fabricated by using the spiro compound of General Formula 1. When used in an organic electroluminescence device, the compound of General Formula 1 provided in the present invention is capable of reducing the drive voltage, and increasing the luminous efficiency, brightness, thermal stability, color purity, and service life of the device.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 26, 2019
    Assignee: NANJING TOPTO MATERIALS CO., LTD.
    Inventors: Jin Woo Kim, Chao Qian, Jun Xu, Dening Wang
  • Patent number: 10153269
    Abstract: A low dynamic resistance, low capacitance diode of a semiconductor device includes a heavily-doped n-type substrate. A lightly-doped n-type layer 1 micron to 5 microns thick is disposed on the n-type substrate. A lightly-doped p-type layer 3 microns to 8 microns thick is disposed on the n-type layer. The low dynamic resistance, low capacitance diode, of the semiconductor device includes a p-type buried layer, with a peak dopant density above 1×1017 cm?3, extending from the p-type layer through the n-type layer to the n-type substrate. The low dynamic resistance, low capacitance diode also includes an n-type region disposed in the p-type layer, extending to a top surface of the p-type layer.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: December 11, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Andrew D. Strachan, Alexei Sadovnikov, Gang Xue, Dening Wang
  • Patent number: 10014682
    Abstract: A system includes a voltage surge protection circuit that receives a source voltage from a source. The voltage surge protection circuit includes a reference circuit to generate a reference voltage based on the source voltage when the source voltage exceeds a clamping voltage and a feedback control circuit to receive the reference voltage and clamp an output voltage to the clamping voltage when the voltage from the source exceeds the clamping voltage. A dynamic resistance of the feedback control circuit is substantially zero.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: July 3, 2018
    Assignee: Texas Instruments Incorporated
    Inventors: Dening Wang, Roland Son
  • Patent number: 9865584
    Abstract: A contact array optimization scheme for ESD devices. In one embodiment, contact apertures patterned through a pre-metal dielectric layer over active areas may be selectively modified in size, shape, placement and the like, to increase ESD protection performance, e.g., such as maximizing the transient current density, etc., in a standard ESD rating test.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: January 9, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: He Lin, Kun Chen, Chao Wu, Dening Wang, Lily Springer, Andy Strachan, Gang Xue
  • Publication number: 20180006013
    Abstract: A contact array optimization scheme for ESD devices. In one embodiment, contact apertures patterned through a pre-metal dielectric layer over active areas may be selectively modified in size, shape, placement and the like, to increase ESD protection performance, e.g., such as maximizing the transient current density, etc., in a standard ESD rating test.
    Type: Application
    Filed: November 4, 2016
    Publication date: January 4, 2018
    Inventors: He LIN, Kun CHEN, Chao WU, Dening WANG, Lily SPRINGER, Andy STRACHAN, Gang XUE
  • Publication number: 20170345813
    Abstract: A low dynamic resistance, low capacitance diode of a semiconductor device includes a heavily-doped n-type substrate. A lightly-doped n-type layer 1 micron to 5 microns thick is disposed on the n-type substrate. A lightly-doped p-type layer 3 microns to 8 microns thick is disposed on the n-type layer. The low dynamic resistance, low capacitance diode, of the semiconductor device includes a p-type buried layer, with a peak dopant density above 1×1017 cm?3, extending from the p-type layer through the n-type layer to the n-type substrate. The low dynamic resistance, low capacitance diode also includes an n-type region disposed in the p-type layer, extending to a top surface of the p-type layer.
    Type: Application
    Filed: August 17, 2017
    Publication date: November 30, 2017
    Inventors: Andrew D. Strachan, Alexei Sadovnikov, Gang Xue, Dening Wang
  • Patent number: 9773777
    Abstract: A low dynamic resistance, low capacitance diode of a semiconductor device includes a heavily-doped n-type substrate. A lightly-doped n-type layer 1 micron to 5 microns thick is disposed on the n-type substrate. A lightly-doped p-type layer 3 microns to 8 microns thick is disposed on the n-type layer. The low dynamic resistance, low capacitance diode, of the semiconductor device includes a p-type buried layer, with a peak dopant density above 1×1017 cm?3, extending from the p-type layer through the n-type layer to the n-type substrate. The low dynamic resistance, low capacitance diode also includes an n-type region disposed in the p-type layer, extending to a top surface of the p-type layer.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: September 26, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Andrew D Strachan, Alexei Sadovnikov, Gang Xue, Dening Wang
  • Publication number: 20170200712
    Abstract: A low dynamic resistance, low capacitance diode of a semiconductor device includes a heavily-doped n-type substrate. A lightly-doped n-type layer 1 micron to 5 microns thick is disposed on the n-type substrate. A lightly-doped p-type layer 3 microns to 8 microns thick is disposed on the n-type layer. The low dynamic resistance, low capacitance diode, of the semiconductor device includes a p-type buried layer, with a peak dopant density above 1×1017 cm?3, extending from the p-type layer through the n-type layer to the n-type substrate. The low dynamic resistance, low capacitance diode also includes an n-type region disposed in the p-type layer, extending to a top surface of the p-type layer.
    Type: Application
    Filed: January 8, 2016
    Publication date: July 13, 2017
    Applicant: Texas Instruments Incorporated
    Inventors: Andrew D. Strachan, Alexei Sadovnikov, Gang Xue, Dening Wang
  • Publication number: 20170125677
    Abstract: The present invention provides a novel organic compound of General Formula 1, a material comprising the same for organic electroluminescence devices, and an organic electroluminescence device comprising the material. The organic compound of the present invention is useful in organic electroluminescence devices as a hole injection layer substance, a hole transport layer substance, an electron blocking layer substance, and an emission layer substance such as green and red phosphorescent host substance, and when used in the organic electroluminescence devices, can reduce the drive voltage, and increase the luminous efficiency, luminance, thermal stability, color purity and service life of the devices.
    Type: Application
    Filed: October 31, 2016
    Publication date: May 4, 2017
    Applicant: NANJING TOPTO MATERIALS CO., LTD.
    Inventors: Jin Woo KIM, Chao QIAN, Jun XU, Dening WANG
  • Publication number: 20170125678
    Abstract: The present invention provides a novel organic compound, a material comprising the same for organic electroluminescence devices, and an organic electroluminescence device comprising the material. The organic compound provided in the present invention is useful in organic electroluminescence devices as a hole injection layer material, a hole transport layer material, an electron blocking layer material, and an emission layer material such as green and red phosphorescent host material, and can reduce the drive voltage, and increase the luminous efficiency, luminance, thermal stability, color purity and service life of the devices.
    Type: Application
    Filed: October 31, 2016
    Publication date: May 4, 2017
    Applicant: NANJING TOPTO MATERIALS CO., LTD.
    Inventors: Jin Woo Kim, Chao QIAN, Jun XU, Dening WANG
  • Publication number: 20170125684
    Abstract: The present invention provides a spiro compound of General Formula 1, and use thereof in the fields of electronic materials, fine chemistry, and medical science. Further, the present invention also provides an organic electroluminescence device fabricated by using the spiro compound of General Formula 1. When used in an organic electroluminescence device, the compound of General Formula 1 provided in the present invention is capable of reducing the drive voltage, and increasing the luminous efficiency, brightness, thermal stability, color purity, and service life of the device.
    Type: Application
    Filed: October 31, 2016
    Publication date: May 4, 2017
    Applicant: NANJING TOPTO MATERIALS CO., LTD.
    Inventors: Jin Woo KIM, Chao QIAN, Jun XU, Dening WANG
  • Publication number: 20170025402
    Abstract: A semiconductor device includes a Zener diode having an anode layer and a cathode layer. The Zener diode provides an electrostatic discharge (ESD) path for ESD signals. At least two channel diodes are coupled to the ESD path of the Zener diode. Each of the channel diodes includes a common cathode layer and a separate anode region. The common cathode layer of the channel diodes is disposed on the cathode layer of the Zener diode. At least two channels are provided where each channel is coupled to one of the separate anode regions to provide an electrical connection for protected signal paths to the ESD path.
    Type: Application
    Filed: March 4, 2016
    Publication date: January 26, 2017
    Inventors: CHRISTOPHER A. OPOCZYNSKI, DENING WANG
  • Publication number: 20150303678
    Abstract: A system includes a voltage surge protection circuit that receives a source voltage from a source. The voltage surge protection circuit includes a reference circuit to generate a reference voltage based on the source voltage when the source voltage exceeds a clamping voltage and a feedback control circuit to receive the reference voltage and clamp an output voltage to the clamping voltage when the voltage from the source exceeds the clamping voltage. A dynamic resistance of the feedback control circuit is substantially zero.
    Type: Application
    Filed: April 22, 2015
    Publication date: October 22, 2015
    Inventors: Dening WANG, Roland SON
  • Patent number: 8760829
    Abstract: An apparatus comprises a first PFET including a first intrinsic body diode; an electrostatic discharge (ESD) subcircuit coupled to a source of the first PFET; a reverse bias voltage element, such as a zener diode, an anode of which is coupled to a gate of the first PFET; a second PFET having a source coupled to a cathode of the zener diode a capacitor coupled to a gate the second PFET; and a first resistor coupled to the gate of the second PFET. The apparatus can protect against both positive and negative electro static transient discharge events.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: June 24, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Liang Wang, Weibiao Zhang, Dening Wang, John Eric Kunz, Jr.
  • Publication number: 20130188286
    Abstract: An apparatus comprises a first PFET including a first intrinsic body diode; an electrostatic discharge (ESD) subcircuit coupled to a source of the first PFET; a reverse bias voltage element, such as a zener diode, an anode of which is coupled to a gate of the first PFET; a second PFET having a source coupled to a cathode of the zener diode a capacitor coupled to a gate the second PFET; and a first resistor coupled to the gate of the second PFET. The apparatus can protect against both positive and negative electro static transient discharge events.
    Type: Application
    Filed: April 2, 2012
    Publication date: July 25, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Liang Wang, Weibiao Zhang, Dening Wang, John Eric Kunz, JR.
  • Patent number: 8130481
    Abstract: Electrostatic discharge (ESD) protection circuits for self-protecting cascode stages are disclosed. In one example, an ESD protection circuit is described. A cascode stage is configured to selectively couple an output pad to a reference terminal. An ESD sensor may detect a change in voltage indicative of an ESD event occurring at the output pad, causing a gate drive to turn on the cascode stage to conduct ESD current in response to detection of the ESD event at the output pad. A leakage blocker is also included to prevent leakage current from the cascode stage to the gate drive while there is not an ESD event.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: March 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Jinyu Yang, Dening Wang, Gregory George Romas, Jr.
  • Patent number: 7855863
    Abstract: Various apparatuses, methods and systems for protecting a driver from electrostatic discharge are disclosed herein. For example, some exemplary embodiments provide a driver, including a buffer, a leakage path blocking transistor connected to an output of the buffer, and an output driver connected to an output of the leakage path blocking transistor. Current from the output driver to the buffer is substantially blocked by the leakage path blocking transistor.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: December 21, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Dening Wang, Yuan Gu, Lin Chen, Jonathan Scott Brodsky, Wei-Chung Wu, Wenliang Chen