Abstract: In order to have operations of a central system executed by a satellite system, a linking structure is located between the central system and the satellite system. The linking structure includes: a communications link between the central system and satellite system; a control card, in the central system, that places said operations in one or more data blocks; and a coupler, in the satellite system, that sends through the link to the control card at least one read command to which the control card responds by sending said data block or blocks through the link to the coupler.

Abstract: In order to have operations of a central system (1) executed by a satellite system (30), a link (17) between the central system (1) and the satellite system (30) includes:

Abstract: The system comprises a central processing unit (CPU) associated with one or more input-output controllers (Ctl1-Ctl4) and a subsystem of redundant disks (MD) divided into logic units and under the control of two redundant disk controllers (SP-A, SP-B). The latter are attached to the input-output controller(s) through equally redundant busses. A first part of the logic units is assigned to the first disk controller (SP-A) and the other part to the second disk controller (SP-B). When a logic unit assigned to the first disk controller (SP-A) is accessed, the state of the second disk controller (SP-B) is supervised through the backup path. In the event that a failure state of the second disk controller (SP-B) is detected, all of the logic units are switched to the first one (SP-A) and are assigned to it. A degraded operating mode is initiated and access to the resources is gained through the backup path.

Abstract: A mode of writing synchronization information on a magnetic recording carrier (DISC) where the information is written in binary code and distributed over a plurality N of tracks, each track being associated with at least one reference zone (ZRP.sub.ij) which includes a group of preamble information (ZSY.sub.ij +ZSA.sub.ij), a group of absolute address information (ZAD.sub.ij), and a group of fine-position information (GDP.sub.ij). According to the invention, the mode of writing is characterized in that the preamble information group includes a first subgroup (ZSY.sub.ij) of synchronizing information preceding a second subgroup of automatic gain control (ZCA.sub.ij). The invention is applicable to magnetooptical memories.

Abstract: A method and apparatus for displacing a system that is movable with respect to a carrier of data recorded on a plurality of tracks, including a reading head (TEL.sub.1), which is displaced on a given path the position on which is measured at predetermined sampling instants (kT), characterized in that: (1) at each instant kT, the value of the state vector X0 k/k-1 is predicted, as a function of the measured position x.sub.m (k-1) and of the control voltage u(k-1), which are considered at the preceding sampling instant (k-1)T; (2) the predicted state vector is compared with a reference state vector Wk); and (3) the control voltage u(k) is calculated as a function of a reference control voltage e(k) at the instant kT and of the difference .epsilon. (k) between the predicted state vector and the reference state vector.

Abstract: Data are written as transitions on plural tracks of a magnetic disc by a transducer which travels along an arcuate curve formed by an arm turning about an axis beyond the disc periphery. Transition positions are defined by the phase thereof relative to that of a reference indicator on a track of the disc. To align the transitions along a predetermined arcuate curve, a reference transition having a reference phase is written onto a given track. Other transitions of the second curve are written with a phase shift relative to the reference phase.

Abstract: The current supplied by an AC power source to a DC load is controlled so that full current is supplied to the load during steady state operation and partial current is supplied during transient conditions. A selectively energized series switch, including first and second parallel branches, is connected between the power source and the load. An impedance in series with one of the switches causes the partial current to be supplied by the power source to the load. The other parallel branch includes no such impedance and therefore feeds full current to the load. A voltage threshold detection circuit, having hysteresis characteristics, responds to the amplitude of the AC source to activate the switches so that no current can be passed through the switches in response to the source amplitude being less than the threshold level.

Abstract: A system for controlling chopping for a converter in a DC electrical power supply.A transistor is arranged for chopping the DC input voltage which is connected to a chopping transformer. A control transistor controls the chopping transistor by means of pulses which it receives from a clock, via a pulse transformer.