Abstract: This read next instruction system (RNI) fetches and parses multi-byte instruction streams by means of a picoprocessor subsystem in conjunction with a state machine controller. These controllers cause the input data, which constitutes software instructions, to be parsed into a plurality of first rank instruction registers. Upon reception of an appropriate command from the main CPU system, the information contained in the first rank registers is transferred into second rank instruction registers. Then the RNI system continues to parse more data which replaces the transferred data in the first rank instruction registers. The data in the second rank instruction registers is used directly by the main CPU for the following functions: map branching and conditional branching based on OP codes and sub OP codes; address computation based on address register and displacement information; use of literals for test masks and software branch address; and determination of word length.

Abstract: The address of an operand in computer main memory is computed by a system which utilizes a base memory frame address in combination with a displacement value, indicative of the position in the frame of the operand relative to the base memory frame address, and information relating to the length of the operand to supply system hardware with the necessary information to enable a fetch of the operand from main memory. This system has the capability to compute addresses for multi-byte word operands within a single firmware clock cycle.

Abstract: The rotate function of this invention involves cyclic shifts of 1 to 4 byte data by an amount of 0, 1, 2, or 3 bytes either to the left or to the right. Only one CPU firmware clock cycle is required regardless of the shift amount. This shifting is done either on data which is transferred from computer memory or on data prior to its transfer into computer memory. Firmware-controlled hardware shifts the bytes in the data field in response to information provided concerning the location of the most significant byte in memory relative to the boundaries of the data word and the length of the data word. The firmware can also directly specify the amount of the shift.