Patents by Inventor Deok-Young Jung

Deok-Young Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240149769
    Abstract: An embodiment is a swing armrest for a seat, the swing armrest including a fixation bracket fixed to a seatback frame or fixed to a seatback bracket that is fixed to the seatback frame, a rotation bracket rotatably fixed to the fixation bracket by a rotation pin, a return spring configured to elastically support the rotation bracket in a direction in which the rotation bracket rotates with respect to the fixation bracket, a fixing post protruding from the rotation bracket to a side of the seat, and an armrest coupled to the fixing post.
    Type: Application
    Filed: April 13, 2023
    Publication date: May 9, 2024
    Inventors: Chan Ho Jung, Deok Soo Lim, Jung Sang You, Sang Soo Lee, Sang Hark Lee, Mu Young Kim, Sang Do Park, Ho Suk Jung
  • Patent number: 11961432
    Abstract: A display device includes a display area and a non-display area disposed around the display area and including a pad area. The display device includes a resistance checker disposed in the non-display area, resistance test pads disposed in the pad area, resistance test lines connecting the resistance checker with the resistance test pad, and crack test lines disposed on the outer side of the resistance checker. The resistance test lines intersect the crack test lines in a plan view.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joo Hye Jung, Keon Woo Kim, Dong Hyun Lee, Deuk Jong Kim, Deok Young Choi
  • Publication number: 20240083384
    Abstract: A vehicle seat reinforcement device includes a leg portion mounted on a floor panel, a seat cushion frame slidably mounted on the leg portion, and a load reinforcing structure connected between the leg portion and the seat cushion frame, wherein when a seat belt anchorage load is transferred to the seat cushion frame, the seat cushion frame is locked to the leg portion by the load reinforcing structure.
    Type: Application
    Filed: February 3, 2023
    Publication date: March 14, 2024
    Applicants: Hyundai Motor Company, Kia Corporation, Daechang Seat Co.,LTD-Dongtan, Hyundai Transys Inc.
    Inventors: Sang Soo LEE, Chan Ho JUNG, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Deok Soo LIM, Sang Do PARK, In Sun BAEK, Sin Chan YANG, Chan Ki CHO, Myung Soo LEE, Jae Yong JANG, Jun Sik HWANG, Ho Sung KANG, Hae Dong KWAK, Hyun Tak KO
  • Publication number: 20240075853
    Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.
    Type: Application
    Filed: April 13, 2023
    Publication date: March 7, 2024
    Applicants: Hyundai Motor Company, Kia Corporation, DAS CO., LTD, Faurecia Korea, Ltd., Hyundai Transys Inc.
    Inventors: Sang Soo LEE, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Sang Do PARK, Chan Ho JUNG, Dong Hoon LEE, Hea Yoon KANG, Deok Soo LIM, Seung Pil JANG, Seon Ho KIM, Jong Seok YUN, Hyo Jin KIM, Dong Gyu SHIN, Jin Ho SEO, Young Jun KIM, Taek Jun NAM
  • Publication number: 20220392841
    Abstract: A semiconductor device includes an etching stop film disposed on a substrate; an interlayer insulating film on the etching stop film; a first trench and a second trench which are spaced apart in a first direction, and penetrate the etching stop film and the interlayer insulating film, the first trench having a side wall that exposes the interlayer insulating film, and the second trench having a side wall that exposes the interlayer insulating film; a first spacer which covers the interlayer insulating film exposed by the side wall of the first trench and does not cover a portion of the side wall of the first trench; a second spacer which covers the interlayer insulating film exposed by the side wall of the second trench and does not cover a portion of the side wall of the second trench; a first barrier layer which extends along a side wall of the first spacer, the portion of the side wall of the first trench not covered by the first spacer, and a bottom surface of the first trench; a first filling film which
    Type: Application
    Filed: February 14, 2022
    Publication date: December 8, 2022
    Inventors: Sung Jin KANG, Jong Min BAEK, Deok Young JUNG, Jun Hyuk LIM
  • Publication number: 20220392800
    Abstract: There is provided a semiconductor device including an etching stop film which is placed disposed on a substrate; an interlayer insulating film which is disposed on the etching stop film; a trench which penetrates the interlayer insulating film and the etching stop film; a spacer which extends along side walls of the trench; a barrier film which extends along the spacer and a bottom surface of the trench; and a filling film which fills the trench on the barrier film. The trench includes a first trench and a second trench which are spaced apart from each other in a first direction and have different widths from each other in the first direction. A bottom surface of the second trench is placed disposed below a bottom surface of the first trench.
    Type: Application
    Filed: May 7, 2022
    Publication date: December 8, 2022
    Inventors: Jun Hyuk LIM, Jong Min BAEK, Deok Young JUNG, Sung Jin KANG, Jang Ho LEE
  • Patent number: 10916437
    Abstract: Provided herein is a method of forming micropatterns, including: forming an etching target film on a substrate; forming a photosensitivity assisting layer on the etching target film, the photosensitivity assisting layer being terminated with a hydrophilic group; forming an adhesive layer on the photosensitivity assisting layer, the adhesive layer forming a covalent bond with the hydrophilic group; forming a hydrophobic photoresist film on the adhesive layer; and patterning the photoresist film.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: February 9, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Shin Jang, Jong-Min Baek, Hoon-Seok Seo, Eui-Bok Lee, Sung-Jin Kang, Vietha Nguyen, Deok-Young Jung, Sang-Hoon Ahn, Hyeok-Sang Oh, Woo-Kyung You
  • Patent number: 10847454
    Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a first insulating film on the substrate, a lower metal layer in the first insulating film, and a second insulating film on the first insulating film. The lower metal layer may be in the second insulating film, the second insulating film may include a lower surface facing the substrate and an upper surface that is opposite the lower surface, and the upper surface of the second insulating film may be upwardly convex. The semiconductor devices may further include a barrier dielectric film including a recess on the second insulating film, and a via metal layer that is in the recess of the barrier dielectric film and electrically connected with the lower metal layer.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: November 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eui Bok Lee, Deok Young Jung, Sang Bom Kang, Doo-Hwan Park, Jong Min Baek, Sang Hoon Ahn, Hyeok Sang Oh, Woo Kyung You
  • Patent number: 10825766
    Abstract: A semiconductor device includes a lower wiring, an interlayer insulation film above the lower wiring and including a first portion having a first density, and a second portion on the first portion, the first portion and the second portion having a same material, and the second portion having a second density smaller than the first density, an upper wiring in the second portion of the interlayer insulating film, and a via in the first portion of the interlayer insulating film, the via connecting the upper wiring and the lower wiring.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: November 3, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Young Kim, Kyu Hee Han, Sung Bin Park, Yeong Gil Kim, Jong Min Baek, Kyoung Woo Lee, Deok Young Jung
  • Patent number: 10804145
    Abstract: A method of fabricating a semiconductor device is provided. The method may include forming a first interlayer insulating film on a substrate, forming a second interlayer insulating film on the first interlayer insulating film, and forming a third interlayer insulating film on the second interlayer insulating film. Different amounts of carbon may be present in each of the first, second, and third interlayer insulating films. The third interlayer insulating film may be used as a mask pattern to form a via trench that extends at least partially into the first interlayer insulating film and the second interlayer insulating film. Supplying a carbon precursor may be interrupted between the forming of the second and third interlayer insulating films, such that the second interlayer insulating film and the third interlayer insulating film may have a discontinuous boundary therebetween.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: October 13, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong Gil Kim, Han Seong Kim, Jong Min Baek, Ji Young Kim, Sung Bin Park, Deok Young Jung, Kyu Hee Han
  • Publication number: 20200227314
    Abstract: A method of fabricating a semiconductor device is provided. The method may include forming a first interlayer insulating film on a substrate, forming a second interlayer insulating film on the first interlayer insulating film, and forming a third interlayer insulating film on the second interlayer insulating film. Different amounts of carbon may be present in each of the first, second, and third interlayer insulating films. The third interlayer insulating film may be used as a mask pattern to form a via trench that extends at least partially into the first interlayer insulating film and the second interlayer insulating film. Supplying a carbon precursor may be interrupted between the forming of the second and third interlayer insulating films, such that the second interlayer insulating film and the third interlayer insulating film may have a discontinuous boundary therebetween.
    Type: Application
    Filed: August 20, 2019
    Publication date: July 16, 2020
    Inventors: Yeong Gil Kim, Han Seong Kim, Jong Min Baek, Ji Young Kim, Sung Bin Park, Deok Young Jung, Kyu Hee Han
  • Publication number: 20200118926
    Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a first insulating film on the substrate, a lower metal layer in the first insulating film, and a second insulating film on the first insulating film. The lower metal layer may be in the second insulating film, the second insulating film may include a lower surface facing the substrate and an upper surface that is opposite the lower surface, and the upper surface of the second insulating film may be upwardly convex. The semiconductor devices may further include a barrier dielectric film including a recess on the second insulating film, and a via metal layer that is in the recess of the barrier dielectric film and electrically connected with the lower metal layer.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Inventors: Eui Bok LEE, Deok Young JUNG, Sang Bom KANG, Doo-Hwan PARK, Jong Min BAEK, Sang Hoon AHN, Hyeok Sang OH, Woo Kyung YOU
  • Publication number: 20200051909
    Abstract: A semiconductor device includes a lower wiring, an interlayer insulation film above the lower wiring and including a first portion having a first density, and a second portion on the first portion, the first portion and the second portion having a same material, and the second portion having a second density smaller than the first density, an upper wiring in the second portion of the interlayer insulating film, and a via in the first portion of the interlayer insulating film, the via connecting the upper wiring and the lower wiring.
    Type: Application
    Filed: February 26, 2019
    Publication date: February 13, 2020
    Inventors: Ji Young KIM, Kyu Hee HAN, Sung Bin PARK, Yeong Gil KIM, Jong Min BAEK, Kyoung Woo LEE, Deok Young JUNG
  • Patent number: 10510658
    Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a first insulating film on the substrate, a lower metal layer in the first insulating film, and a second insulating film on the first insulating film. The lower metal layer may be in the second insulating film, the second insulating film may include a lower surface facing the substrate and an upper surface that is opposite the lower surface, and the upper surface of the second insulating film may be upwardly convex. The semiconductor devices may further include a barrier dielectric film including a recess on the second insulating film, and a via metal layer that is in the recess of the barrier dielectric film and electrically connected with the lower metal layer.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: December 17, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eui Bok Lee, Deok Young Jung, Sang Bom Kang, Doo-Hwan Park, Jong Min Baek, Sang Hoon Ahn, Hyeok Sang Oh, Woo Kyung You
  • Publication number: 20190198342
    Abstract: Provided herein is a method of forming micropatterns, including: forming an etching target film on a substrate; forming a photosensitivity assisting layer on the etching target film, the photosensitivity assisting layer being terminated with a hydrophilic group; forming an adhesive layer on the photosensitivity assisting layer, the adhesive layer forming a covalent bond with the hydrophilic group; forming a hydrophobic photoresist film on the adhesive layer; and patterning the photoresist film.
    Type: Application
    Filed: December 27, 2018
    Publication date: June 27, 2019
    Inventors: SANG-SHIN JANG, JONG-MIN BAEK, HOON-SEOK SEO, EUI-BOK LEE, SUNG-JIN KANG, VIETHA NGUYEN, DEOK-YOUNG JUNG, SANG-HOON AHN, HYEOK-SANG OH, WOO-KYUNG YOU
  • Publication number: 20190181088
    Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a first insulating film on the substrate, a lower metal layer in the first insulating film, and a second insulating film on the first insulating film. The lower metal layer may be in the second insulating film, the second insulating film may include a lower surface facing the substrate and an upper surface that is opposite the lower surface, and the upper surface of the second insulating film may be upwardly convex. The semiconductor devices may further include a barrier dielectric film including a recess on the second insulating film, and a via metal layer that is in the recess of the barrier dielectric film and electrically connected with the lower metal layer.
    Type: Application
    Filed: July 19, 2018
    Publication date: June 13, 2019
    Inventors: Eui Bok Lee, Deok Young JUNG, Sang Bom KANG, Doo-Hwan PARK, Jong Min BAEK, Sang Hoon AHN, Hyeok Sang OH, Woo Kyung YOU
  • Patent number: 10096549
    Abstract: Semiconductor devices including an interconnection structure are provided. The devices may include an etch stop layer on a lower structure including a contact structure, a buffer layer on the etch stop layer, an intermetal insulating layer including a low-k dielectric material on the buffer layer. The intermetal insulating layer may include a first region having a first dielectric constant and a second region having a second dielectric constant different from the first dielectric constant. The device may also include interconnection structure including a plug portion electrically connected to the contact structure and an interconnection portion on the plug portion. The plug portion may include a first portion extending through the etch stop layer and a second portion that is in the intermetal insulating layer and has a width greater than a width of the first portion. The interconnection portion may include opposing lateral surfaces surrounded by the intermetal insulating layer.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: October 9, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung Hee Kim, Thomas Oszinda, Deok Young Jung, Jong Min Baek, Tae Jin Yim
  • Publication number: 20180076140
    Abstract: Semiconductor devices including an interconnection structure are provided. The devices may include an etch stop layer on a lower structure including a contact structure, a buffer layer on the etch stop layer, an intermetal insulating layer including a low-k dielectric material on the buffer layer. The intermetal insulating layer may include a first region having a first dielectric constant and a second region having a second dielectric constant different from the first dielectric constant. The device may also include interconnection structure including a plug portion electrically connected to the contact structure and an interconnection portion on the plug portion. The plug portion may include a first portion extending through the etch stop layer and a second portion that is in the intermetal insulating layer and has a width greater than a width of the first portion. The interconnection portion may include opposing lateral surfaces surrounded by the intermetal insulating layer.
    Type: Application
    Filed: April 5, 2017
    Publication date: March 15, 2018
    Inventors: Byung Hee KIM, Thomas Oszinda, Deok Young Jung, Jong Min Baek, Tae Jin Yim
  • Patent number: 9831164
    Abstract: A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: November 28, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-jin Moon, Pil-kyu Kang, Dae-lok Bae, Gil-heyun Choi, Byung-lyul Park, Dong-chan Lim, Deok-young Jung
  • Patent number: 9530726
    Abstract: A semiconductor device includes a via structure having a top surface with a planar portion and a protrusion portion that is surrounded by the planar portion, and includes a conductive structure including a plurality of conductive lines contacting at least a part of the top surface of the via structure.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: December 27, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-jin Moon, Byung-Iyul Park, Dong-chan Lim, Deok-young Jung, Gil-heyun Choi, Dae-lok Bae, Pil-kyu Kang