Abstract: Techniques for controlling a remotely controllable device are described. In an example, a mobile device detects a remotely controllable device, measures a distance and direction from the mobile device to the remotely controllable device, and determines from the distance and direction that the mobile device is pointing at the remotely controllable device. In response to determining that the mobile device is in a handheld position, is pointing at the remotely controllable device, or both, the mobile device monitors for a movement of the mobile device according to a prescribed gesture. In response to detecting that the mobile device was moved according to the prescribed gesture, the mobile device presents a collection of selectable actions control operations of the remotely controllable device.

Abstract: This document describes improvements in range and reliability for wireless mesh networks implementing IEEE 802.11 networking technologies. Reducing the number of spatial streams, N, to a lower value at middle and far distance ranges using an optimized rate control algorithm, preemptively trades off a lower throughput limit for a higher link budget. This higher link budget provides longer range and higher RF link reliability by using an N×N spatial diversity of MIMO RF channels for maximizing link budget instead of network throughput.

Abstract: This disclosure describes apparatuses, methods, and techniques for supporting multiple protocols with selective amplification, such as 5 GHz Wi-Fi®, 2.4 GHz Wi-Fi®, 2.4 GHz Bluetooth Classic®, 2.4 GHz BLE®, and/or 2.4 GHz IEEE 802.15.4 (e.g., Thread® or ZigBee®) protocols. In more detail, the disclosure describes a multi-protocol transceiver system that includes a front-end architecture, which enables the multi-protocol transceiver system to transmit and receive the wireless communication signals according to the multiple protocols. The multi-protocol transceiver system may utilize one or more antennas to transmit and receive the multiple protocols.

Abstract: An integrated circuit (IC) for compensating for a package inductance is disclosed. A first ground pad is directly connected to an on-chip ground node. A second IC ground pad is connected to the on-chip ground node via a tunable capacitor circuit, where the capacitance of the tunable capacitor circuit resonates with the package inductance at the operating frequency of the IC.

Abstract: Improved ESD protection circuits for RFICs requiring both high voltage and high frequency operation is described. A cascode grounded gate snap-back NFET (GGNFET) combined with a precharge circuit and a diode network results in a positive ESD protection clamp with low capacitance and high turn-on voltage. The positive ESD protection clamp provides ESD protection to an IC during a positive voltage ESD pulse. Exemplary embodiments of a negative ESD protection clamp are disclosed where a bias circuit or a charge pump is used in place of the precharge circuit in a manner that allows the combination of the bias circuit or the charge pump together with a diode network and a cascode grounded gate snap-back NFET to provide protection against negative ESD voltage pulses. The combination of a positive and a negative ESD protection clamp provides ESD protection to an IC during either a positive or a negative voltage ESD pulse.

Abstract: An integrated circuit (IC) for compensating for a package inductance is disclosed. A first ground pad is directly connected to an on-chip ground node. A second IC ground pad is connected to the on-chip ground node via a tunable capacitor circuit, where the capacitance of the tunable capacitor circuit resonates with the package inductance at the operating frequency of the IC.

Abstract: Improved ESD protection circuits for RFICs requiring both high voltage and high frequency operation is described. A cascode grounded gate snap-back NFET (GGNFET) combined with a precharge circuit and a diode network results in a positive ESD protection clamp with low capacitance and high turn-on voltage. The positive ESD protection clamp provides ESD protection to an IC during a positive voltage ESD pulse. Exemplary embodiments of a negative ESD protection clamp are disclosed where a bias circuit or a charge pump is used in place of the precharge circuit in a manner that allows the combination of the bias circuit or the charge pump together with a diode network and a cascode grounded gate snap-back NFET to provide protection against negative ESD voltage pulses. The combination of a positive and a negative ESD protection clamp provides ESD protection to an IC during either a positive or a negative voltage ESD pulse.