Abstract: Embodiments disclosed are directed to systems and methods for modifying an electronic circuit design. According to embodiments, the method includes generating a circuit element of an electronic circuit layout on a graphical user interface, and generating an array group including a plurality of circuit elements. Each cell of the array group includes the same circuit element, and the array group is generated such that a change in at least one attribute of the array group is applied to each circuit element of the plurality of circuit elements.

Abstract: Embodiments disclosed herein describe systems, methods, and products for aligning wires in an integrated circuit (IC) design. An illustrative computer may identity multiple references in a first set of wires and multiple targets in a second set of wires in the IC design. The computer may determine reference target pairs from the multiple references and multiple targets. The computer may calculate a path difference for each of the reference target pairs and align the corresponding wires based upon the path difference while obeying minimum spacing rules. The computer may also allow a circuit designer to modify or override the computer selected references, targets, or reference target pairs. Embodiments disclosed herein therefore mitigate the alignment problems of shorting and incorrect spacing.

Abstract: The present embodiments relate to providing an overlap view of external and internal components of all instance circuit cells related to a master circuit cell in a same layout view. A layout of a circuit having a plurality of instance circuit cells of a master circuit cell is provided. Further, a graphical user interface including a user selectable option for an overlay view is provided. In addition, responsive to the selection of the overlay view, the plurality of instance circuit cells of the master circuit cell is determined. In addition, a plurality of sets of circuit elements, each set of circuit elements including external circuit elements that overlap with a corresponding instance circuit cell of the plurality of instance circuit cells is determined. Further, the plurality of sets of circuit elements overlaid on the master circuit cell is displayed on the layout view.

Abstract: The present embodiments relate generally to integrated circuit design, and more particularly to techniques that automatically and dynamically create or adjust a highlight set in a graphical user interface for allowing designers to edit layouts in a hierarchical design in a more productive manner. According to certain aspects, in dense designs and/or designs having complete or partial overlapping shapes, embodiments allow for highlighting more than one hierarchy level with tuned parameters that improve the user experience and enhance user work productivity. According to other aspects, embodiments allow for highlighting shapes using colors and/or widths that allow both highlight and shape to be clearly visible and distinguishable.

Abstract: The present embodiments relate generally to integrated circuit design, and more particularly to techniques for providing enhanced visual information about a shape of interest in a hierarchical design. For example, embodiments relate to automatically and dynamically creating or adjust a highlight set in a graphical user interface for providing hierarchical information about shapes in a hierarchical design in a more productive manner, and possibly concurrently with other textual information about shapes that is being displayed. In these and other embodiments, these automatic and/or dynamic highlight sets can be based on the relationship between a current cursor position and shapes of a hierarchical design that is currently being edited using a GUI of a layout editor tool that is adapted with the functionality of the present disclosure.

Abstract: Methods and systems of an electronic circuit design system described herein provide a new layout editor tool to make edits in an electronic circuit layout. A plurality of partitions is created in the electronic circuit layout. The new layout editor tool enables multiple electronic circuit designers to edit a different partition of the plurality of partitions of the same electronic circuit layout at the same time and save the edited partition locally.

Abstract: An electronic circuit design system for generating a programmable set of figures of an electronic circuit layout is provided. The system includes a non-transitory machine-readable layout database storing an electronic circuit layout of an electronic circuit design. The system further includes a circuit designer interface for viewing representations of the electronic circuit layout on a display unit and receiving inputs by one or more electronic circuit designers. The system further includes a processor configured to generate a figure group in the electronic circuit layout of the electronic circuit design; generate one or more templates comprising one or more parameters and a programming language code; and generate a parameterized figure group by associating the one or more templates to the figure group.