Abstract: Disclosed is a method for evaluating thicknesses of cobalt-rich crusts on seamounts, which comprises following steps: dividing a study area of cobalt-rich crusts into geological grid units, assigning crust thickness values to geological grid units; obtaining the crust thicknesses of the geological sampling stations in a preset influence range in the adjacent areas based on geological sampling station information; estimating the crust thicknesses in a certain distance range of the stations by a “distance-slope” spatial interpolation method, and through a spatial similarity of a crusts spatial distribution caused by a relationship between the distance and the slope, assigning values to grid units outside adjacent areas and within an influence range of the spatial similarity relationship; assigning values to the geological grid units that failed to obtain crust thickness value through an expected assignment method, and obtaining the crust thicknesses of the study areas.

Abstract: Disclosed are an electromagnetic shielding structure and a manufacturing method thereof, and an electronic product. The manufacturing method includes covering an injection mold on a circuit substrate, so that different circuit units on the circuit substrate are respectively accommodated in different injection molding cavities of the injection mold; injecting a non-conductive plastic sealant into the injection molding cavities so as to form non-conductive plastic sealing bodies on the circuit units, wherein spacing grooves are formed between the non-conductive plastic sealing bodies; and forming a conductive shielding layer on the non-conductive plastic sealing bodies, so that the conductive shielding layer covers the non-conductive plastic sealing bodies and fills the spacing grooves to form shielding barrier walls, thereby realizing shielding between the different circuit units in respective cavities.

Abstract: Disclosed is a packaging structure for circuit units, comprising: a circuit baseplate, wherein the circuit baseplate is provided thereon with a circuit unit, the circuit unit including a silicon dioxide layer and an electronic device arranged on the silicon dioxide layer; an insulator, wherein the insulator surrounds the circuit unit; and an electromagnetic shielding layer, wherein the electromagnetic shielding layer covers the circuit unit and the insulator.

Abstract: Disclosed is a packaging method for circuit units, wherein the circuit units comprise a silicon layer substrate and a silicon dioxide layer overlaid on the silicon layer substrate. The packaging method for a circuit unit comprises: attaching a plurality of circuit units to a circuit baseplate in a spaced and inverted mode, wherein the silicon dioxide layer is attached to the circuit baseplate, and the silicon layer substrate faces away from the circuit baseplate; forming an insulator between the circuit units; removing the silicon layer substrate to expose the silicon dioxide layer; and forming an electromagnetic shielding layer on the silicon dioxide layer and the insulator.

Abstract: Disclosed is a method for packaging a chip, comprising the following steps: providing a baseplate formed with an open slot thereon penetrating through opposite sides of the baseplate; providing a release base material, wherein the release base material is bonded to a first side of the baseplate and covers the open slot; providing a chip, wherein the chip is mounted on the release base material at the position of the open slot; packaging a second side of the baseplate facing away from the release base material so as to form a packaging layer which packages the chip and fixes it on the baseplate; removing the release base material so as to obtain a package structure for the chip.

Abstract: Disclosed is a shielding process for SIP packaging, including: providing a circuit board; cutting the covering layer to form half-cut trenches separating different SIP packaging modules from each other, and to form grooves in each single SIP packaging module; forming a metal overlay, the metal overlay on an outer surface of the SIP packaging module and at positions where the half-cut trenches are located constituting a conformal shielding, the metal overlay at positions where the grooves are located constituting a compartment shielding; and cutting the half-cut trenches to obtain a plurality of SIP packaging modules that are separate from each other.

Abstract: Disclosed are an electromagnetic shielding structure and a manufacturing method thereof, and an electronic product. The manufacturing method comprising the following steps: covering an injection mold on a circuit substrate, so that different circuit units on the circuit substrate are respectively accommodated in different injection molding cavities of the injection mold; injecting a non-conductive plastic sealant into the injection molding cavities so as to form non-conductive plastic sealing bodies on the circuit units, wherein spacing grooves are formed between the non-conductive plastic sealing bodies; and forming a conductive shielding layer on the non-conductive plastic sealing bodies, so that the conductive shielding layer covers the non-conductive plastic sealing bodies and fills the spacing grooves to form shielding barrier walls, thereby realizing shielding between the different circuit units in respective cavities.

Abstract: Disclosed is a method for detecting coverage rate of an intermetallic compound, the method comprising putting a chip subjected to wire bonding into a mixed reagent of fuming nitric acid and fuming sulfuric acid for soaking, wherein the chip subjected to wire bonding comprises a silver wire and an aluminum pad; taking out the chip after the silver wire is removed; and detecting the coverage rate of an intermetallic compound on the aluminum pad.

Abstract: A method of bonding a die comprising solder bumps to a substrate comprising bond pads, the method comprising the steps of heating the die from a first temperature to a second temperature, wherein the first temperature is below the melting point of the solder bumps, and the second temperature is above the melting point of the solder bumps; moving the die relative to the substrate to a first height, whereat the solder bumps contact the bond pads; moving the die further away from the substrate to a second height, while maintaining contact between the solder bumps and bond pads; and thereafter cooling the die from the second temperature to a third temperature to allow the solder bumps to solidify so as to bond the die to the substrate.

Abstract: A method of bonding a die comprising solder bumps to a substrate comprising bond pads, the method comprising the steps of heating the die from a first temperature to a second temperature, wherein the first temperature is below the melting point of the solder bumps, and the second temperature is above the melting point of the solder bumps; moving the die relative to the substrate to a first height, whereat the solder bumps contact the bond pads; moving the die further away from the substrate to a second height, while maintaining contact between the solder bumps and bond pads; and thereafter cooling the die from the second temperature to a third temperature to allow the solder bumps to solidify so as to bond the die to the substrate.

Abstract: For selecting suitable bonding parameters for forming wire bonds onto bond pads of a substrate, one or more indentations are made onto at least one bond pad of the substrate with an indentation tool by applying a series of predetermined forces onto the at least one bond pad with the indentation tool. A depth-force profile of the substrate is measured comprising a relationship between each predetermined force that is applied and a resultant depth of the indentation made by the indentation tool. An appropriate set of bonding parameters suitable for forming wire bonds on the substrate is determined based on the measured depth-force profile.

Abstract: For selecting suitable bonding parameters for forming wire bonds onto bond pads of a substrate, one or more indentations are made onto at least one bond pad of the substrate with an indentation tool by applying a series of predetermined forces onto the at least one bond pad with the indentation tool. A depth-force profile of the substrate is measured comprising a relationship between each predetermined force that is applied and a resultant depth of the indentation made by the indentation tool. An appropriate set of bonding parameters suitable for forming wire bonds on the substrate is determined based on the measured depth-force profile.